[−][src]Module lpc54606_pac::dmic0::channel
Register block no description available
Modules
| dc_ctrl | DC Control register 0 |
| divhfclk | DMIC Clock Register 0 |
| fifo_ctrl | FIFO Control register 0 |
| fifo_data | FIFO Data Register 0 |
| fifo_status | FIFO Status register 0 |
| gainshift | Decimator Gain Shift register |
| osr | Oversample Rate register 0 |
| phy_ctrl | PDM Source Configuration register 0 |
| preac2fscoef | Pre-Emphasis Filter Coefficient for 2 FS register |
| preac4fscoef | Pre-Emphasis Filter Coefficient for 4 FS register |
Type Definitions
| DC_CTRL | DC Control register 0 |
| DIVHFCLK | DMIC Clock Register 0 |
| FIFO_CTRL | FIFO Control register 0 |
| FIFO_DATA | FIFO Data Register 0 |
| FIFO_STATUS | FIFO Status register 0 |
| GAINSHIFT | Decimator Gain Shift register |
| OSR | Oversample Rate register 0 |
| PHY_CTRL | PDM Source Configuration register 0 |
| PREAC2FSCOEF | Pre-Emphasis Filter Coefficient for 2 FS register |
| PREAC4FSCOEF | Pre-Emphasis Filter Coefficient for 4 FS register |