Module lpc43xx::i2s0::rxrate [] [src]

I2S Receive MCLK divider. This register determines the I2S RX MCLK rate by specifying the value to divide PCLK by in order to produce MCLK.

Structs

R

Value read from the register

W

Value to write to the register

X_DIVIDERR

Value of the field

Y_DIVIDERR

Value of the field

_X_DIVIDERW

Proxy

_Y_DIVIDERW

Proxy