Module lpc43xx::creg
[−]
[src]
Configuration Registers (CREG)
Modules
chipid |
Part ID |
creg0 |
Chip configuration register 32 kHz oscillator output and BOD control register. |
creg5 |
Chip configuration register 5. Controls JTAG access. |
creg6 |
Chip configuration register 6. Controls multiple functions : Ethernet interface, SCT output, I2S0/1 inputs, EMC clock. |
dmamux |
DMA mux control |
etbcfg |
ETB RAM configuration |
flashcfga |
Flash accelerator configuration register for flash bank A |
flashcfgb |
Flash accelerator configuration register for flash bank B |
m0appmemmap |
ARM Cortex-M0APP memory mapping |
m0apptxevent |
Cortex-M0APP TXEV event clear |
m0submemmap |
ARM Cortex-M0SUB memory mapping |
m0subtxevent |
Cortex-M0SUB TXEV event clear |
m4memmap |
ARM Cortex-M4 memory mapping |
m4txevent |
Cortex-M4 TXEV event clear |
usb0fladj |
USB0 frame length adjust register |
usb1fladj |
USB1 frame length adjust register |
Structs
CHIPID |
Part ID |
CREG0 |
Chip configuration register 32 kHz oscillator output and BOD control register. |
CREG5 |
Chip configuration register 5. Controls JTAG access. |
CREG6 |
Chip configuration register 6. Controls multiple functions : Ethernet interface, SCT output, I2S0/1 inputs, EMC clock. |
DMAMUX |
DMA mux control |
ETBCFG |
ETB RAM configuration |
FLASHCFGA |
Flash accelerator configuration register for flash bank A |
FLASHCFGB |
Flash accelerator configuration register for flash bank B |
M0APPMEMMAP |
ARM Cortex-M0APP memory mapping |
M0APPTXEVENT |
Cortex-M0APP TXEV event clear |
M0SUBMEMMAP |
ARM Cortex-M0SUB memory mapping |
M0SUBTXEVENT |
Cortex-M0SUB TXEV event clear |
M4MEMMAP |
ARM Cortex-M4 memory mapping |
M4TXEVENT |
Cortex-M4 TXEV event clear |
RegisterBlock |
Register block |
USB0FLADJ |
USB0 frame length adjust register |
USB1FLADJ |
USB1 frame length adjust register |