[−][src]Module lpc176x_5x::adc
Analog-to-Digital Converter (ADC)
Modules
| cr | A/D Control Register. The ADCR register must be written to select the operating mode before A/D conversion can occur. |
| dr | A/D Channel 0 Data Register. This register contains the result of the most recent conversion completed on channel 0. |
| gdr | A/D Global Data Register. This register contains the ADC's DONE bit and the result of the most recent A/D conversion. |
| inten | A/D Interrupt Enable Register. This register contains enable bits that allow the DONE flag of each A/D channel to be included or excluded from contributing to the generation of an A/D interrupt. |
| stat | A/D Status Register. This register contains DONE and OVERRUN flags for all of the A/D channels, as well as the A/D interrupt/DMA flag. |
| trm | ADC trim register. |
Structs
| CR | A/D Control Register. The ADCR register must be written to select the operating mode before A/D conversion can occur. |
| DR | A/D Channel 0 Data Register. This register contains the result of the most recent conversion completed on channel 0. |
| GDR | A/D Global Data Register. This register contains the ADC's DONE bit and the result of the most recent A/D conversion. |
| INTEN | A/D Interrupt Enable Register. This register contains enable bits that allow the DONE flag of each A/D channel to be included or excluded from contributing to the generation of an A/D interrupt. |
| RegisterBlock | Register block |
| STAT | A/D Status Register. This register contains DONE and OVERRUN flags for all of the A/D channels, as well as the A/D interrupt/DMA flag. |
| TRM | ADC trim register. |