Expand description
Peripheral access API for LPC176X5X microcontrollers (generated using svd2rust v0.24.0 ( ))
You can find an overview of the generated API here.
API features to be included in the next
svd2rust release can be generated by cloning the svd2rust repository, checking out the above commit, and running cargo doc --open.
Re-exports
pub use self::Interrupt as interrupt;pub use timer0 as timer1;pub use can1 as can2;pub use i2c0 as i2c1;pub use ssp1 as ssp0;pub use timer0 as timer2;pub use timer0 as timer3;pub use uart0 as uart2;pub use uart0 as uart3;pub use i2c0 as i2c2;Modules
Analog-to-Digital Converter (ADC)
CAN1 controller
CAN controller acceptance filter
CAN acceptance filter RAM
Central CAN controller
Digital-to-Analog Converter (DAC)
Ethernet
Common register and bit access and modify traits
General purpose DMA controller
General Purpose I/O
GPIO
I2C bus interface
I2S interface
Motor Control PWM
Pin connect block
Pulse Width Modulators (PWM1)
Quadrature Encoder Interface (QEI)
Repetitive Interrupt Timer (RIT)
Real Time Clock (RTC)
SPI
SSP1 controller
System and clock control
Timer0/1/2/3
UART0/2/3
UART1
USB device/host/OTG controller
Watchdog Timer (WDT)
Structs
Analog-to-Digital Converter (ADC)
CAN1 controller
CAN1 controller
CAN controller acceptance filter
CAN acceptance filter RAM
Cache and branch predictor maintenance operations
Central CAN controller
CPUID
Core peripherals
Digital-to-Analog Converter (DAC)
Debug Control Block
Data Watchpoint and Trace unit
Ethernet
Flash Patch and Breakpoint unit
General purpose DMA controller
General Purpose I/O
GPIO
I2C bus interface
I2C bus interface
I2C bus interface
I2S interface
Instrumentation Trace Macrocell
Motor Control PWM
Memory Protection Unit
Nested Vector Interrupt Controller
Pin connect block
Pulse Width Modulators (PWM1)
All the peripherals
Quadrature Encoder Interface (QEI)
Repetitive Interrupt Timer (RIT)
Real Time Clock (RTC)
System Control Block
SPI
SSP controller
SSP1 controller
System and clock control
SysTick: System Timer
Timer0/1/2/3
Timer0/1/2/3
Timer0/1/2/3
Timer0/1/2/3
Trace Port Interface Unit
UART0/2/3
UART1
UART0/2/3
UART0/2/3
USB device/host/OTG controller
Watchdog Timer (WDT)
Enums
Enumeration of all the interrupts.
Constants
Number available in the NVIC for configuring priority