Module lokacore::arch::x86_64

Intrinsics for the x86_64 processor family.

Structs

m128	A 128-bit SIMD value. Always used as f32x4.
m128i	A 128-bit SIMD value. Integral data, lanes determined by each op.
m128d	A 128-bit SIMD value. Always used as f64x2.

Functions

cache_flush	Flushes the cache line pointed to from all levels.
pause	Hint to the CPU that you're doing a spin-wait loop.
prefetch0	Prefetch the cache line into all cache levels.
prefetch1	Prefetch the cache line into L2 and higher.
prefetch2	Prefetch the cache line into L3 and higher (or best effort).
prefetch_nta	Prefetch with non-temporal hint.
rdrand16_step	Attempts to produce a u16 from the hardware RNG.
rdrand32_step	Attempts to produce a u32 from the hardware RNG.
rdrand64_step	Attempts to produce a u64 from the hardware RNG.
rdtsc	As _rdtsc.
transpose4	Transposes, in place, the four m128 values as if they formed a 4x4 Matrix.