Module llvmint::nvvm

LLVM intrinsics for the nvvm architecture.

Functions

abs_i
abs_ll
add_rm_d
add_rm_f
add_rm_ftz_f
add_rn_d
add_rn_f
add_rn_ftz_f
add_rp_d
add_rp_f
add_rp_ftz_f
add_rz_d
add_rz_f
add_rz_ftz_f
barrier0
barrier0_and
barrier0_or
barrier0_popc
bitcast_d2ll
bitcast_f2i
bitcast_i2f
bitcast_ll2d
brev32
brev64
ceil_d
ceil_f
ceil_ftz_f
clz_i
clz_ll
compiler_error
compiler_warn
cos_approx_f
cos_approx_ftz_f
d2f_rm
d2f_rm_ftz
d2f_rn
d2f_rn_ftz
d2f_rp
d2f_rp_ftz
d2f_rz
d2f_rz_ftz
d2i_hi
d2i_lo
d2i_rm
d2i_rn
d2i_rp
d2i_rz
d2ll_rm
d2ll_rn
d2ll_rp
d2ll_rz
d2ui_rm
d2ui_rn
d2ui_rp
d2ui_rz
d2ull_rm
d2ull_rn
d2ull_rp
d2ull_rz
div_approx_f
div_approx_ftz_f
div_rm_d
div_rm_f
div_rm_ftz_f
div_rn_d
div_rn_f
div_rn_ftz_f
div_rp_d
div_rp_f
div_rp_ftz_f
div_rz_d
div_rz_f
div_rz_ftz_f
ex2_approx_d
ex2_approx_f
ex2_approx_ftz_f
f2h_rn
f2h_rn_ftz
f2i_rm
f2i_rm_ftz
f2i_rn
f2i_rn_ftz
f2i_rp
f2i_rp_ftz
f2i_rz
f2i_rz_ftz
f2ll_rm
f2ll_rm_ftz
f2ll_rn
f2ll_rn_ftz
f2ll_rp
f2ll_rp_ftz
f2ll_rz
f2ll_rz_ftz
f2ui_rm
f2ui_rm_ftz
f2ui_rn
f2ui_rn_ftz
f2ui_rp
f2ui_rp_ftz
f2ui_rz
f2ui_rz_ftz
f2ull_rm
f2ull_rm_ftz
f2ull_rn
f2ull_rn_ftz
f2ull_rp
f2ull_rp_ftz
f2ull_rz
f2ull_rz_ftz
fabs_d
fabs_f
fabs_ftz_f
floor_d
floor_f
floor_ftz_f
fma_rm_d
fma_rm_f
fma_rm_ftz_f
fma_rn_d
fma_rn_f
fma_rn_ftz_f
fma_rp_d
fma_rp_f
fma_rp_ftz_f
fma_rz_d
fma_rz_f
fma_rz_ftz_f
fmax_d
fmax_f
fmax_ftz_f
fmin_d
fmin_f
fmin_ftz_f
h2f
i2d_rm
i2d_rn
i2d_rp
i2d_rz
i2f_rm
i2f_rn
i2f_rp
i2f_rz
isspacep_const
isspacep_global
isspacep_local
isspacep_shared
istypep_sampler
istypep_surface
istypep_texture
lg2_approx_d
lg2_approx_f
lg2_approx_ftz_f
ll2d_rm
ll2d_rn
ll2d_rp
ll2d_rz
ll2f_rm
ll2f_rn
ll2f_rp
ll2f_rz
lohi_i2d
max_i
max_ll
max_ui
max_ull
membar_cta
membar_gl
membar_sys
min_i
min_ll
min_ui
min_ull
move_double
move_float
move_i16
move_i32
move_i64
move_ptr
mul24_i
mul24_ui
mul_rm_d
mul_rm_f
mul_rm_ftz_f
mul_rn_d
mul_rn_f
mul_rn_ftz_f
mul_rp_d
mul_rp_f
mul_rp_ftz_f
mul_rz_d
mul_rz_f
mul_rz_ftz_f
mulhi_i
mulhi_ll
mulhi_ui
mulhi_ull
popc_i
popc_ll
prmt
ptr_constant_to_gen
ptr_gen_to_constant
ptr_gen_to_global
ptr_gen_to_local
ptr_gen_to_param
ptr_gen_to_shared
ptr_global_to_gen
ptr_local_to_gen
ptr_shared_to_gen
rcp_approx_ftz_d
rcp_rm_d
rcp_rm_f
rcp_rm_ftz_f
rcp_rn_d
rcp_rn_f
rcp_rn_ftz_f
rcp_rp_d
rcp_rp_f
rcp_rp_ftz_f
rcp_rz_d
rcp_rz_f
rcp_rz_ftz_f
read_ptx_sreg_ctaid_x
read_ptx_sreg_ctaid_y
read_ptx_sreg_ctaid_z
read_ptx_sreg_envreg0
read_ptx_sreg_envreg1
read_ptx_sreg_envreg10
read_ptx_sreg_envreg11
read_ptx_sreg_envreg12
read_ptx_sreg_envreg13
read_ptx_sreg_envreg14
read_ptx_sreg_envreg15
read_ptx_sreg_envreg16
read_ptx_sreg_envreg17
read_ptx_sreg_envreg18
read_ptx_sreg_envreg19
read_ptx_sreg_envreg2
read_ptx_sreg_envreg20
read_ptx_sreg_envreg21
read_ptx_sreg_envreg22
read_ptx_sreg_envreg23
read_ptx_sreg_envreg24
read_ptx_sreg_envreg25
read_ptx_sreg_envreg26
read_ptx_sreg_envreg27
read_ptx_sreg_envreg28
read_ptx_sreg_envreg29
read_ptx_sreg_envreg3
read_ptx_sreg_envreg30
read_ptx_sreg_envreg31
read_ptx_sreg_envreg4
read_ptx_sreg_envreg5
read_ptx_sreg_envreg6
read_ptx_sreg_envreg7
read_ptx_sreg_envreg8
read_ptx_sreg_envreg9
read_ptx_sreg_nctaid_x
read_ptx_sreg_nctaid_y
read_ptx_sreg_nctaid_z
read_ptx_sreg_ntid_x
read_ptx_sreg_ntid_y
read_ptx_sreg_ntid_z
read_ptx_sreg_tid_x
read_ptx_sreg_tid_y
read_ptx_sreg_tid_z
read_ptx_sreg_warpsize
reflect
rotate_b32
rotate_b64
rotate_right_b64
round_d
round_f
round_ftz_f
rsqrt_approx_d
rsqrt_approx_f
rsqrt_approx_ftz_f
sad_i
sad_ui
saturate_d
saturate_f
saturate_ftz_f
sin_approx_f
sin_approx_ftz_f
sqrt_approx_f
sqrt_approx_ftz_f
sqrt_f
sqrt_rm_d
sqrt_rm_f
sqrt_rm_ftz_f
sqrt_rn_d
sqrt_rn_f
sqrt_rn_ftz_f
sqrt_rp_d
sqrt_rp_f
sqrt_rp_ftz_f
sqrt_rz_d
sqrt_rz_f
sqrt_rz_ftz_f
suld_1d_array_i16_clamp
suld_1d_array_i16_trap
suld_1d_array_i16_zero
suld_1d_array_i32_clamp
suld_1d_array_i32_trap
suld_1d_array_i32_zero
suld_1d_array_i64_clamp
suld_1d_array_i64_trap
suld_1d_array_i64_zero
suld_1d_array_i8_clamp
suld_1d_array_i8_trap
suld_1d_array_i8_zero
suld_1d_i16_clamp
suld_1d_i16_trap
suld_1d_i16_zero
suld_1d_i32_clamp
suld_1d_i32_trap
suld_1d_i32_zero
suld_1d_i64_clamp
suld_1d_i64_trap
suld_1d_i64_zero
suld_1d_i8_clamp
suld_1d_i8_trap
suld_1d_i8_zero
suld_2d_array_i16_clamp
suld_2d_array_i16_trap
suld_2d_array_i16_zero
suld_2d_array_i32_clamp
suld_2d_array_i32_trap
suld_2d_array_i32_zero
suld_2d_array_i64_clamp
suld_2d_array_i64_trap
suld_2d_array_i64_zero
suld_2d_array_i8_clamp
suld_2d_array_i8_trap
suld_2d_array_i8_zero
suld_2d_i16_clamp
suld_2d_i16_trap
suld_2d_i16_zero
suld_2d_i32_clamp
suld_2d_i32_trap
suld_2d_i32_zero
suld_2d_i64_clamp
suld_2d_i64_trap
suld_2d_i64_zero
suld_2d_i8_clamp
suld_2d_i8_trap
suld_2d_i8_zero
suld_3d_i16_clamp
suld_3d_i16_trap
suld_3d_i16_zero
suld_3d_i32_clamp
suld_3d_i32_trap
suld_3d_i32_zero
suld_3d_i64_clamp
suld_3d_i64_trap
suld_3d_i64_zero
suld_3d_i8_clamp
suld_3d_i8_trap
suld_3d_i8_zero
suq_array_size
suq_channel_data_type
suq_channel_order
suq_depth
suq_height
suq_width
sust_b_1d_array_i16_clamp
sust_b_1d_array_i16_trap
sust_b_1d_array_i16_zero
sust_b_1d_array_i32_clamp
sust_b_1d_array_i32_trap
sust_b_1d_array_i32_zero
sust_b_1d_array_i64_clamp
sust_b_1d_array_i64_trap
sust_b_1d_array_i64_zero
sust_b_1d_array_i8_clamp
sust_b_1d_array_i8_trap
sust_b_1d_array_i8_zero
sust_b_1d_array_v2i16_clamp
sust_b_1d_array_v2i16_trap
sust_b_1d_array_v2i16_zero
sust_b_1d_array_v2i32_clamp
sust_b_1d_array_v2i32_trap
sust_b_1d_array_v2i32_zero
sust_b_1d_array_v2i64_clamp
sust_b_1d_array_v2i64_trap
sust_b_1d_array_v2i64_zero
sust_b_1d_array_v2i8_clamp
sust_b_1d_array_v2i8_trap
sust_b_1d_array_v2i8_zero
sust_b_1d_array_v4i16_clamp
sust_b_1d_array_v4i16_trap
sust_b_1d_array_v4i16_zero
sust_b_1d_array_v4i32_clamp
sust_b_1d_array_v4i32_trap
sust_b_1d_array_v4i32_zero
sust_b_1d_array_v4i8_clamp
sust_b_1d_array_v4i8_trap
sust_b_1d_array_v4i8_zero
sust_b_1d_i16_clamp
sust_b_1d_i16_trap
sust_b_1d_i16_zero
sust_b_1d_i32_clamp
sust_b_1d_i32_trap
sust_b_1d_i32_zero
sust_b_1d_i64_clamp
sust_b_1d_i64_trap
sust_b_1d_i64_zero
sust_b_1d_i8_clamp
sust_b_1d_i8_trap
sust_b_1d_i8_zero
sust_b_1d_v2i16_clamp
sust_b_1d_v2i16_trap
sust_b_1d_v2i16_zero
sust_b_1d_v2i32_clamp
sust_b_1d_v2i32_trap
sust_b_1d_v2i32_zero
sust_b_1d_v2i64_clamp
sust_b_1d_v2i64_trap
sust_b_1d_v2i64_zero
sust_b_1d_v2i8_clamp
sust_b_1d_v2i8_trap
sust_b_1d_v2i8_zero
sust_b_1d_v4i16_clamp
sust_b_1d_v4i16_trap
sust_b_1d_v4i16_zero
sust_b_1d_v4i32_clamp
sust_b_1d_v4i32_trap
sust_b_1d_v4i32_zero
sust_b_1d_v4i8_clamp
sust_b_1d_v4i8_trap
sust_b_1d_v4i8_zero
sust_b_2d_array_i16_clamp
sust_b_2d_array_i16_trap
sust_b_2d_array_i16_zero
sust_b_2d_array_i32_clamp
sust_b_2d_array_i32_trap
sust_b_2d_array_i32_zero
sust_b_2d_array_i64_clamp
sust_b_2d_array_i64_trap
sust_b_2d_array_i64_zero
sust_b_2d_array_i8_clamp
sust_b_2d_array_i8_trap
sust_b_2d_array_i8_zero
sust_b_2d_array_v2i16_clamp
sust_b_2d_array_v2i16_trap
sust_b_2d_array_v2i16_zero
sust_b_2d_array_v2i32_clamp
sust_b_2d_array_v2i32_trap
sust_b_2d_array_v2i32_zero
sust_b_2d_array_v2i64_clamp
sust_b_2d_array_v2i64_trap
sust_b_2d_array_v2i64_zero
sust_b_2d_array_v2i8_clamp
sust_b_2d_array_v2i8_trap
sust_b_2d_array_v2i8_zero
sust_b_2d_array_v4i16_clamp
sust_b_2d_array_v4i16_trap
sust_b_2d_array_v4i16_zero
sust_b_2d_array_v4i32_clamp
sust_b_2d_array_v4i32_trap
sust_b_2d_array_v4i32_zero
sust_b_2d_array_v4i8_clamp
sust_b_2d_array_v4i8_trap
sust_b_2d_array_v4i8_zero
sust_b_2d_i16_clamp
sust_b_2d_i16_trap
sust_b_2d_i16_zero
sust_b_2d_i32_clamp
sust_b_2d_i32_trap
sust_b_2d_i32_zero
sust_b_2d_i64_clamp
sust_b_2d_i64_trap
sust_b_2d_i64_zero
sust_b_2d_i8_clamp
sust_b_2d_i8_trap
sust_b_2d_i8_zero
sust_b_2d_v2i16_clamp
sust_b_2d_v2i16_trap
sust_b_2d_v2i16_zero
sust_b_2d_v2i32_clamp
sust_b_2d_v2i32_trap
sust_b_2d_v2i32_zero
sust_b_2d_v2i64_clamp
sust_b_2d_v2i64_trap
sust_b_2d_v2i64_zero
sust_b_2d_v2i8_clamp
sust_b_2d_v2i8_trap
sust_b_2d_v2i8_zero
sust_b_2d_v4i16_clamp
sust_b_2d_v4i16_trap
sust_b_2d_v4i16_zero
sust_b_2d_v4i32_clamp
sust_b_2d_v4i32_trap
sust_b_2d_v4i32_zero
sust_b_2d_v4i8_clamp
sust_b_2d_v4i8_trap
sust_b_2d_v4i8_zero
sust_b_3d_i16_clamp
sust_b_3d_i16_trap
sust_b_3d_i16_zero
sust_b_3d_i32_clamp
sust_b_3d_i32_trap
sust_b_3d_i32_zero
sust_b_3d_i64_clamp
sust_b_3d_i64_trap
sust_b_3d_i64_zero
sust_b_3d_i8_clamp
sust_b_3d_i8_trap
sust_b_3d_i8_zero
sust_b_3d_v2i16_clamp
sust_b_3d_v2i16_trap
sust_b_3d_v2i16_zero
sust_b_3d_v2i32_clamp
sust_b_3d_v2i32_trap
sust_b_3d_v2i32_zero
sust_b_3d_v2i64_clamp
sust_b_3d_v2i64_trap
sust_b_3d_v2i64_zero
sust_b_3d_v2i8_clamp
sust_b_3d_v2i8_trap
sust_b_3d_v2i8_zero
sust_b_3d_v4i16_clamp
sust_b_3d_v4i16_trap
sust_b_3d_v4i16_zero
sust_b_3d_v4i32_clamp
sust_b_3d_v4i32_trap
sust_b_3d_v4i32_zero
sust_b_3d_v4i8_clamp
sust_b_3d_v4i8_trap
sust_b_3d_v4i8_zero
sust_p_1d_array_i16_trap
sust_p_1d_array_i32_trap
sust_p_1d_array_i8_trap
sust_p_1d_array_v2i16_trap
sust_p_1d_array_v2i32_trap
sust_p_1d_array_v2i8_trap
sust_p_1d_array_v4i16_trap
sust_p_1d_array_v4i32_trap
sust_p_1d_array_v4i8_trap
sust_p_1d_i16_trap
sust_p_1d_i32_trap
sust_p_1d_i8_trap
sust_p_1d_v2i16_trap
sust_p_1d_v2i32_trap
sust_p_1d_v2i8_trap
sust_p_1d_v4i16_trap
sust_p_1d_v4i32_trap
sust_p_1d_v4i8_trap
sust_p_2d_array_i16_trap
sust_p_2d_array_i32_trap
sust_p_2d_array_i8_trap
sust_p_2d_array_v2i16_trap
sust_p_2d_array_v2i32_trap
sust_p_2d_array_v2i8_trap
sust_p_2d_array_v4i16_trap
sust_p_2d_array_v4i32_trap
sust_p_2d_array_v4i8_trap
sust_p_2d_i16_trap
sust_p_2d_i32_trap
sust_p_2d_i8_trap
sust_p_2d_v2i16_trap
sust_p_2d_v2i32_trap
sust_p_2d_v2i8_trap
sust_p_2d_v4i16_trap
sust_p_2d_v4i32_trap
sust_p_2d_v4i8_trap
sust_p_3d_i16_trap
sust_p_3d_i32_trap
sust_p_3d_i8_trap
sust_p_3d_v2i16_trap
sust_p_3d_v2i32_trap
sust_p_3d_v2i8_trap
sust_p_3d_v4i16_trap
sust_p_3d_v4i32_trap
sust_p_3d_v4i8_trap
swap_lo_hi_b64
texsurf_handle_internal
trunc_d
trunc_f
trunc_ftz_f
txq_array_size
txq_channel_data_type
txq_channel_order
txq_depth
txq_height
txq_num_mipmap_levels
txq_num_samples
txq_width
ui2d_rm
ui2d_rn
ui2d_rp
ui2d_rz
ui2f_rm
ui2f_rn
ui2f_rp
ui2f_rz
ull2d_rm
ull2d_rn
ull2d_rp
ull2d_rz
ull2f_rm
ull2f_rn
ull2f_rp
ull2f_rz