Trait lis3dh::Lis3dhCore

pub trait Lis3dhCore {
    type BusError;
    type PinError;

    // Required methods
    fn write_register(
        &mut self,
        register: Register,
        value: u8
    ) -> Result<(), Error<Self::BusError, Self::PinError>>;
    fn read_register(
        &mut self,
        register: Register
    ) -> Result<u8, Error<Self::BusError, Self::PinError>>;
    fn read_accel_bytes(
        &mut self
    ) -> Result<[u8; 6], Error<Self::BusError, Self::PinError>>;
}

Required Associated Types

type BusError

type PinError

Required Methods

fn write_register( &mut self, register: Register, value: u8 ) -> Result<(), Error<Self::BusError, Self::PinError>>

fn read_register( &mut self, register: Register ) -> Result<u8, Error<Self::BusError, Self::PinError>>

fn read_accel_bytes( &mut self ) -> Result<[u8; 6], Error<Self::BusError, Self::PinError>>

Implementors

impl<CORE> Lis3dhCore for Lis3dh<CORE>

where CORE: Lis3dhCore,

type BusError = <CORE as Lis3dhCore>::BusError

type PinError = <CORE as Lis3dhCore>::PinError

impl<I2C, E> Lis3dhCore for Lis3dhI2C<I2C>

where I2C: WriteRead<Error = E> + Write<Error = E>,

type BusError = E

type PinError = Infallible

impl<SPI, NSS, ESPI, ENSS> Lis3dhCore for Lis3dhSPI<SPI, NSS>

where SPI: Write<u8, Error = ESPI> + Transfer<u8, Error = ESPI>, NSS: OutputPin<Error = ENSS>,

type BusError = ESPI

type PinError = ENSS