Module ksz8863::miim

MII Management (MIIM) Interface.

The IEEE 802.3 MII Management Interface, also known as the Management Data Input/Output (MDIO) Interface. Allows for upper-layer devices to monitor and control the states of the switch.

Each of the 8 16-bit registers are indexed via a 5-bit address, preceded by a 5-bit PHY address.

Re-exports

pub use bcr::Bcr;

pub use bsr::Bsr;

pub use phyidr1::PhyIdR1;

pub use phyidr2::PhyIdR2;

pub use anar::Anar;

pub use anlpar::Anlpar;

pub use link_md::LinkMd;

pub use phy_special::PhySpecial;

Modules

anar
anlpar
bcr
bsr
link_md
phy_special
phyidr1
phyidr2

Structs

Map	A map of the state of all registers in the impl_registers invocation.
Miim	A higher-level wrapper around an miim::Read and/or miim::Write implementation.
Phy	A wrapper around an miim::Read and/or miim::Write implementation for a particular PHY.
PhyReg	A wrapper around an miim::Read and/or miim::Write implementation for a particular register on a particular PHY.
R	A type wrapper that allows to read the individual fields of a register.
W	A type wrapper that allows to write to the individual fields of a register.

Enums

Address	The set of implemented MIIM register addresses on the KSZ8863.
State	A dynamic representation of a register's state.

Constants

DEFAULT_PHY_ADDRS

The default PHY addresses of the two PHYs on the KSZ8863.

Traits

Register

Implemented for all 16-bit MIIM registers.