[][src]Trait ksz8863::smi::Register

pub trait Register: Default + From<u8> + Into<u8> {
    pub const ADDRESS: Address;
}

Implemented for all 8-bit SMI registers.

Associated Constants

pub const ADDRESS: Address[src]

The address at which the register can be located via the SMI interface.

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Implementors

impl Register for ChipId0[src]

impl Register for ChipId1[src]

impl Register for FiberSignalThreshold[src]

impl Register for ForcePauseOff[src]

impl Register for FwdInvalidVidFrameAndHostMode[src]

impl Register for Gc0[src]

impl Register for Gc1[src]

impl Register for Gc2[src]

impl Register for Gc3[src]

impl Register for Gc4[src]

impl Register for Gc5[src]

impl Register for Gc9[src]

impl Register for Gc10[src]

impl Register for Gc11[src]

impl Register for Gc12[src]

impl Register for Gc13[src]

impl Register for HighPriorityPacketBufferQ0[src]

impl Register for HighPriorityPacketBufferQ1[src]

impl Register for HighPriorityPacketBufferQ2[src]

impl Register for HighPriorityPacketBufferQ3[src]

impl Register for IndirectAccessCtrl0[src]

impl Register for IndirectAccessCtrl1[src]

impl Register for IndirectData0[src]

impl Register for IndirectData1[src]

impl Register for IndirectData2[src]

impl Register for IndirectData3[src]

impl Register for IndirectData4[src]

impl Register for IndirectData5[src]

impl Register for IndirectData6[src]

impl Register for IndirectData7[src]

impl Register for IndirectData8[src]

impl Register for InsertSrcPvid[src]

impl Register for InternalLdoCtrl[src]

impl Register for InterruptEnable[src]

impl Register for LinkChangeInterrupt[src]

impl Register for MacAddr0[src]

impl Register for MacAddr1[src]

impl Register for MacAddr2[src]

impl Register for MacAddr3[src]

impl Register for MacAddr4[src]

impl Register for MacAddr5[src]

impl Register for Mode[src]

impl Register for PmUsageFlowCtrlSelectMode1[src]

impl Register for PmUsageFlowCtrlSelectMode2[src]

impl Register for PmUsageFlowCtrlSelectMode3[src]

impl Register for PmUsageFlowCtrlSelectMode4[src]

impl Register for Port1Ctrl0[src]

impl Register for Port1Ctrl1[src]

impl Register for Port1Ctrl2[src]

impl Register for Port1Ctrl3[src]

impl Register for Port1Ctrl4[src]

impl Register for Port1Ctrl5[src]

impl Register for Port1Ctrl12[src]

impl Register for Port1Ctrl13[src]

impl Register for Port1LinkMdResult[src]

impl Register for Port1PhySpecial[src]

impl Register for Port1Q0IngressRateLimit[src]

impl Register for Port1Q1IngressRateLimit[src]

impl Register for Port1Q2IngressRateLimit[src]

impl Register for Port1Q3IngressRateLimit[src]

impl Register for Port1Status0[src]

impl Register for Port1Status1[src]

impl Register for Port1TxqSplitForQ0[src]

impl Register for Port1TxqSplitForQ1[src]

impl Register for Port1TxqSplitForQ2[src]

impl Register for Port1TxqSplitForQ3[src]

impl Register for Port2Ctrl0[src]

impl Register for Port2Ctrl1[src]

impl Register for Port2Ctrl2[src]

impl Register for Port2Ctrl3[src]

impl Register for Port2Ctrl4[src]

impl Register for Port2Ctrl5[src]

impl Register for Port2Ctrl12[src]

impl Register for Port2Ctrl13[src]

impl Register for Port2LinkMdResult[src]

impl Register for Port2PhySpecial[src]

impl Register for Port2Q0IngressRateLimit[src]

impl Register for Port2Q1IngressRateLimit[src]

impl Register for Port2Q2IngressRateLimit[src]

impl Register for Port2Q3IngressRateLimit[src]

impl Register for Port2Status0[src]

impl Register for Port2Status1[src]

impl Register for Port2TxqSplitForQ0[src]

impl Register for Port2TxqSplitForQ1[src]

impl Register for Port2TxqSplitForQ2[src]

impl Register for Port2TxqSplitForQ3[src]

impl Register for Port3Ctrl0[src]

impl Register for Port3Ctrl1[src]

impl Register for Port3Ctrl2[src]

impl Register for Port3Ctrl3[src]

impl Register for Port3Ctrl4[src]

impl Register for Port3Ctrl5[src]

impl Register for Port3Q0IngressRateLimit[src]

impl Register for Port3Q1IngressRateLimit[src]

impl Register for Port3Q2IngressRateLimit[src]

impl Register for Port3Q3IngressRateLimit[src]

impl Register for Port3Status1[src]

impl Register for Port3TxqSplitForQ0[src]

impl Register for Port3TxqSplitForQ1[src]

impl Register for Port3TxqSplitForQ2[src]

impl Register for Port3TxqSplitForQ3[src]

impl Register for PwrMgmtAndLedMode[src]

impl Register for Reset[src]

impl Register for SleepMode[src]

impl Register for Station1MacAddr0[src]

impl Register for Station1MacAddr1[src]

impl Register for Station1MacAddr2[src]

impl Register for Station1MacAddr3[src]

impl Register for Station1MacAddr4[src]

impl Register for Station1MacAddr5[src]

impl Register for Station2MacAddr0[src]

impl Register for Station2MacAddr1[src]

impl Register for Station2MacAddr2[src]

impl Register for Station2MacAddr3[src]

impl Register for Station2MacAddr4[src]

impl Register for Station2MacAddr5[src]

impl Register for TosPriorityCtrl0[src]

impl Register for TosPriorityCtrl1[src]

impl Register for TosPriorityCtrl2[src]

impl Register for TosPriorityCtrl3[src]

impl Register for TosPriorityCtrl4[src]

impl Register for TosPriorityCtrl5[src]

impl Register for TosPriorityCtrl6[src]

impl Register for TosPriorityCtrl7[src]

impl Register for TosPriorityCtrl8[src]

impl Register for TosPriorityCtrl9[src]

impl Register for TosPriorityCtrl10[src]

impl Register for TosPriorityCtrl11[src]

impl Register for TosPriorityCtrl12[src]

impl Register for TosPriorityCtrl13[src]

impl Register for TosPriorityCtrl14[src]

impl Register for TosPriorityCtrl15[src]

impl Register for UserDef1[src]

impl Register for UserDef2[src]

impl Register for UserDef3[src]

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