[−][src]Crate kaze
kaze provides an API to describe Module
s composed of Signal
s, which can then be used to generate Rust simulator code or verilog modules.
kaze's API is designed to be as minimal as possible while still being expressive. It's designed to prevent the user from being able to describe buggy or incorrect hardware as much as possible. This enables a user to hack on designs fearlessly, while the API and generators ensure that these designs are sound.
Usage
[dependencies]
kaze = "0.1"
Examples
use kaze::*; // Create a context, which will contain our module(s) let c = Context::new(); // Create a module let inverter = c.module("Inverter"); let i = inverter.input("i", 1); // 1-bit input inverter.output("o", !i); // Output inverted input // Generate Rust simulator code sim::generate(inverter, std::io::stdout())?; // Generate verilog code verilog::generate(inverter, std::io::stdout())?;
Modules
sim | Rust simulator code generation. |
verilog | Verilog code generation. |
Structs
Context | A top-level container/owner object for a |
Instance | An instance of a |
Module | A self-contained and potentially-reusable hardware design unit, created by the |
Register | |
Signal | Represents a collection of 1 or more bits driven by some source. |
Enums
Constant | A container for different types of integer constant values. |
Constants
MAX_SIGNAL_BIT_WIDTH | The maximum allowed bit width for any given |
MIN_SIGNAL_BIT_WIDTH | The minimum allowed bit width for any given |
Functions
if_ | UNSTABLE: Provides a convenient way to write conditional combinational logic. |