#[doc = r" Value read from the register"]
pub struct R {
bits: u8,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u8,
}
impl super::C2 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = "Possible values of the field `SBK`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum SBKR {
#[doc = "Normal transmitter operation."]
_0,
#[doc = "Queue break characters to be sent."]
_1,
}
impl SBKR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
SBKR::_0 => false,
SBKR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> SBKR {
match value {
false => SBKR::_0,
true => SBKR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == SBKR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == SBKR::_1
}
}
#[doc = "Possible values of the field `RWU`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RWUR {
#[doc = "Normal operation."]
_0,
#[doc = "RWU enables the wakeup function and inhibits further receiver interrupt requests. Normally, hardware wakes the receiver by automatically clearing RWU."]
_1,
}
impl RWUR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
RWUR::_0 => false,
RWUR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> RWUR {
match value {
false => RWUR::_0,
true => RWUR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == RWUR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == RWUR::_1
}
}
#[doc = "Possible values of the field `RE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RER {
#[doc = "Receiver off."]
_0,
#[doc = "Receiver on."]
_1,
}
impl RER {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
RER::_0 => false,
RER::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> RER {
match value {
false => RER::_0,
true => RER::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == RER::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == RER::_1
}
}
#[doc = "Possible values of the field `TE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TER {
#[doc = "Transmitter off."]
_0,
#[doc = "Transmitter on."]
_1,
}
impl TER {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
TER::_0 => false,
TER::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> TER {
match value {
false => TER::_0,
true => TER::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == TER::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == TER::_1
}
}
#[doc = "Possible values of the field `ILIE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ILIER {
#[doc = "IDLE interrupt requests disabled. and DMA transfer"]
_0,
#[doc = "IDLE interrupt requests enabled. or DMA transfer"]
_1,
}
impl ILIER {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
ILIER::_0 => false,
ILIER::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> ILIER {
match value {
false => ILIER::_0,
true => ILIER::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == ILIER::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == ILIER::_1
}
}
#[doc = "Possible values of the field `RIE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RIER {
#[doc = "RDRF interrupt and DMA transfer requests disabled."]
_0,
#[doc = "RDRF interrupt or DMA transfer requests enabled."]
_1,
}
impl RIER {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
RIER::_0 => false,
RIER::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> RIER {
match value {
false => RIER::_0,
true => RIER::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == RIER::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == RIER::_1
}
}
#[doc = "Possible values of the field `TCIE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TCIER {
#[doc = "TC interrupt and DMA transfer requests disabled."]
_0,
#[doc = "TC interrupt or DMA transfer requests enabled."]
_1,
}
impl TCIER {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
TCIER::_0 => false,
TCIER::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> TCIER {
match value {
false => TCIER::_0,
true => TCIER::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == TCIER::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == TCIER::_1
}
}
#[doc = "Possible values of the field `TIE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TIER {
#[doc = "TDRE interrupt and DMA transfer requests disabled."]
_0,
#[doc = "TDRE interrupt or DMA transfer requests enabled."]
_1,
}
impl TIER {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
TIER::_0 => false,
TIER::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> TIER {
match value {
false => TIER::_0,
true => TIER::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == TIER::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == TIER::_1
}
}
#[doc = "Values that can be written to the field `SBK`"]
pub enum SBKW {
#[doc = "Normal transmitter operation."]
_0,
#[doc = "Queue break characters to be sent."]
_1,
}
impl SBKW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
SBKW::_0 => false,
SBKW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _SBKW<'a> {
w: &'a mut W,
}
impl<'a> _SBKW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: SBKW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Normal transmitter operation."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(SBKW::_0)
}
#[doc = "Queue break characters to be sent."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(SBKW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u8) << OFFSET);
self.w.bits |= ((value & MASK) as u8) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `RWU`"]
pub enum RWUW {
#[doc = "Normal operation."]
_0,
#[doc = "RWU enables the wakeup function and inhibits further receiver interrupt requests. Normally, hardware wakes the receiver by automatically clearing RWU."]
_1,
}
impl RWUW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
RWUW::_0 => false,
RWUW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _RWUW<'a> {
w: &'a mut W,
}
impl<'a> _RWUW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: RWUW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Normal operation."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(RWUW::_0)
}
#[doc = "RWU enables the wakeup function and inhibits further receiver interrupt requests. Normally, hardware wakes the receiver by automatically clearing RWU."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(RWUW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 1;
self.w.bits &= !((MASK as u8) << OFFSET);
self.w.bits |= ((value & MASK) as u8) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `RE`"]
pub enum REW {
#[doc = "Receiver off."]
_0,
#[doc = "Receiver on."]
_1,
}
impl REW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
REW::_0 => false,
REW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _REW<'a> {
w: &'a mut W,
}
impl<'a> _REW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: REW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Receiver off."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(REW::_0)
}
#[doc = "Receiver on."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(REW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 2;
self.w.bits &= !((MASK as u8) << OFFSET);
self.w.bits |= ((value & MASK) as u8) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `TE`"]
pub enum TEW {
#[doc = "Transmitter off."]
_0,
#[doc = "Transmitter on."]
_1,
}
impl TEW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
TEW::_0 => false,
TEW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _TEW<'a> {
w: &'a mut W,
}
impl<'a> _TEW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: TEW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Transmitter off."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(TEW::_0)
}
#[doc = "Transmitter on."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(TEW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 3;
self.w.bits &= !((MASK as u8) << OFFSET);
self.w.bits |= ((value & MASK) as u8) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `ILIE`"]
pub enum ILIEW {
#[doc = "IDLE interrupt requests disabled. and DMA transfer"]
_0,
#[doc = "IDLE interrupt requests enabled. or DMA transfer"]
_1,
}
impl ILIEW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
ILIEW::_0 => false,
ILIEW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _ILIEW<'a> {
w: &'a mut W,
}
impl<'a> _ILIEW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: ILIEW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "IDLE interrupt requests disabled. and DMA transfer"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(ILIEW::_0)
}
#[doc = "IDLE interrupt requests enabled. or DMA transfer"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(ILIEW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 4;
self.w.bits &= !((MASK as u8) << OFFSET);
self.w.bits |= ((value & MASK) as u8) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `RIE`"]
pub enum RIEW {
#[doc = "RDRF interrupt and DMA transfer requests disabled."]
_0,
#[doc = "RDRF interrupt or DMA transfer requests enabled."]
_1,
}
impl RIEW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
RIEW::_0 => false,
RIEW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _RIEW<'a> {
w: &'a mut W,
}
impl<'a> _RIEW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: RIEW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "RDRF interrupt and DMA transfer requests disabled."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(RIEW::_0)
}
#[doc = "RDRF interrupt or DMA transfer requests enabled."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(RIEW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 5;
self.w.bits &= !((MASK as u8) << OFFSET);
self.w.bits |= ((value & MASK) as u8) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `TCIE`"]
pub enum TCIEW {
#[doc = "TC interrupt and DMA transfer requests disabled."]
_0,
#[doc = "TC interrupt or DMA transfer requests enabled."]
_1,
}
impl TCIEW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
TCIEW::_0 => false,
TCIEW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _TCIEW<'a> {
w: &'a mut W,
}
impl<'a> _TCIEW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: TCIEW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "TC interrupt and DMA transfer requests disabled."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(TCIEW::_0)
}
#[doc = "TC interrupt or DMA transfer requests enabled."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(TCIEW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 6;
self.w.bits &= !((MASK as u8) << OFFSET);
self.w.bits |= ((value & MASK) as u8) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `TIE`"]
pub enum TIEW {
#[doc = "TDRE interrupt and DMA transfer requests disabled."]
_0,
#[doc = "TDRE interrupt or DMA transfer requests enabled."]
_1,
}
impl TIEW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
TIEW::_0 => false,
TIEW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _TIEW<'a> {
w: &'a mut W,
}
impl<'a> _TIEW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: TIEW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "TDRE interrupt and DMA transfer requests disabled."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(TIEW::_0)
}
#[doc = "TDRE interrupt or DMA transfer requests enabled."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(TIEW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 7;
self.w.bits &= !((MASK as u8) << OFFSET);
self.w.bits |= ((value & MASK) as u8) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
#[doc = "Bit 0 - Send Break"]
#[inline]
pub fn sbk(&self) -> SBKR {
SBKR::_from({
const MASK: bool = true;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u8) != 0
})
}
#[doc = "Bit 1 - Receiver Wakeup Control"]
#[inline]
pub fn rwu(&self) -> RWUR {
RWUR::_from({
const MASK: bool = true;
const OFFSET: u8 = 1;
((self.bits >> OFFSET) & MASK as u8) != 0
})
}
#[doc = "Bit 2 - Receiver Enable"]
#[inline]
pub fn re(&self) -> RER {
RER::_from({
const MASK: bool = true;
const OFFSET: u8 = 2;
((self.bits >> OFFSET) & MASK as u8) != 0
})
}
#[doc = "Bit 3 - Transmitter Enable"]
#[inline]
pub fn te(&self) -> TER {
TER::_from({
const MASK: bool = true;
const OFFSET: u8 = 3;
((self.bits >> OFFSET) & MASK as u8) != 0
})
}
#[doc = "Bit 4 - Idle Line Interrupt DMA Transfer Enable"]
#[inline]
pub fn ilie(&self) -> ILIER {
ILIER::_from({
const MASK: bool = true;
const OFFSET: u8 = 4;
((self.bits >> OFFSET) & MASK as u8) != 0
})
}
#[doc = "Bit 5 - Receiver Full Interrupt or DMA Transfer Enable"]
#[inline]
pub fn rie(&self) -> RIER {
RIER::_from({
const MASK: bool = true;
const OFFSET: u8 = 5;
((self.bits >> OFFSET) & MASK as u8) != 0
})
}
#[doc = "Bit 6 - Transmission Complete Interrupt or DMA Transfer Enable"]
#[inline]
pub fn tcie(&self) -> TCIER {
TCIER::_from({
const MASK: bool = true;
const OFFSET: u8 = 6;
((self.bits >> OFFSET) & MASK as u8) != 0
})
}
#[doc = "Bit 7 - Transmitter Interrupt or DMA Transfer Enable."]
#[inline]
pub fn tie(&self) -> TIER {
TIER::_from({
const MASK: bool = true;
const OFFSET: u8 = 7;
((self.bits >> OFFSET) & MASK as u8) != 0
})
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bit 0 - Send Break"]
#[inline]
pub fn sbk(&mut self) -> _SBKW {
_SBKW { w: self }
}
#[doc = "Bit 1 - Receiver Wakeup Control"]
#[inline]
pub fn rwu(&mut self) -> _RWUW {
_RWUW { w: self }
}
#[doc = "Bit 2 - Receiver Enable"]
#[inline]
pub fn re(&mut self) -> _REW {
_REW { w: self }
}
#[doc = "Bit 3 - Transmitter Enable"]
#[inline]
pub fn te(&mut self) -> _TEW {
_TEW { w: self }
}
#[doc = "Bit 4 - Idle Line Interrupt DMA Transfer Enable"]
#[inline]
pub fn ilie(&mut self) -> _ILIEW {
_ILIEW { w: self }
}
#[doc = "Bit 5 - Receiver Full Interrupt or DMA Transfer Enable"]
#[inline]
pub fn rie(&mut self) -> _RIEW {
_RIEW { w: self }
}
#[doc = "Bit 6 - Transmission Complete Interrupt or DMA Transfer Enable"]
#[inline]
pub fn tcie(&mut self) -> _TCIEW {
_TCIEW { w: self }
}
#[doc = "Bit 7 - Transmitter Interrupt or DMA Transfer Enable."]
#[inline]
pub fn tie(&mut self) -> _TIEW {
_TIEW { w: self }
}
}