#[doc = r" Value read from the register"]
pub struct R {
bits: u8,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u8,
}
impl super::S {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = "Possible values of the field `RXAK`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RXAKR {
#[doc = "Acknowledge signal was received after the completion of one byte of data transmission on the bus"]
_0,
#[doc = "No acknowledge signal detected"]
_1,
}
impl RXAKR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
RXAKR::_0 => false,
RXAKR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> RXAKR {
match value {
false => RXAKR::_0,
true => RXAKR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == RXAKR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == RXAKR::_1
}
}
#[doc = "Possible values of the field `IICIF`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum IICIFR {
#[doc = "No interrupt pending"]
_0,
#[doc = "Interrupt pending"]
_1,
}
impl IICIFR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
IICIFR::_0 => false,
IICIFR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> IICIFR {
match value {
false => IICIFR::_0,
true => IICIFR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == IICIFR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == IICIFR::_1
}
}
#[doc = "Possible values of the field `SRW`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum SRWR {
#[doc = "Slave receive, master writing to slave"]
_0,
#[doc = "Slave transmit, master reading from slave"]
_1,
}
impl SRWR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
SRWR::_0 => false,
SRWR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> SRWR {
match value {
false => SRWR::_0,
true => SRWR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == SRWR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == SRWR::_1
}
}
#[doc = "Possible values of the field `RAM`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RAMR {
#[doc = "Not addressed"]
_0,
#[doc = "Addressed as a slave"]
_1,
}
impl RAMR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
RAMR::_0 => false,
RAMR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> RAMR {
match value {
false => RAMR::_0,
true => RAMR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == RAMR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == RAMR::_1
}
}
#[doc = "Possible values of the field `ARBL`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ARBLR {
#[doc = "Standard bus operation."]
_0,
#[doc = "Loss of arbitration."]
_1,
}
impl ARBLR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
ARBLR::_0 => false,
ARBLR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> ARBLR {
match value {
false => ARBLR::_0,
true => ARBLR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == ARBLR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == ARBLR::_1
}
}
#[doc = "Possible values of the field `BUSY`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum BUSYR {
#[doc = "Bus is idle"]
_0,
#[doc = "Bus is busy"]
_1,
}
impl BUSYR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
BUSYR::_0 => false,
BUSYR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> BUSYR {
match value {
false => BUSYR::_0,
true => BUSYR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == BUSYR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == BUSYR::_1
}
}
#[doc = "Possible values of the field `IAAS`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum IAASR {
#[doc = "Not addressed"]
_0,
#[doc = "Addressed as a slave"]
_1,
}
impl IAASR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
IAASR::_0 => false,
IAASR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> IAASR {
match value {
false => IAASR::_0,
true => IAASR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == IAASR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == IAASR::_1
}
}
#[doc = "Possible values of the field `TCF`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TCFR {
#[doc = "Transfer in progress"]
_0,
#[doc = "Transfer complete"]
_1,
}
impl TCFR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
TCFR::_0 => false,
TCFR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> TCFR {
match value {
false => TCFR::_0,
true => TCFR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == TCFR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == TCFR::_1
}
}
#[doc = "Values that can be written to the field `IICIF`"]
pub enum IICIFW {
#[doc = "No interrupt pending"]
_0,
#[doc = "Interrupt pending"]
_1,
}
impl IICIFW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
IICIFW::_0 => false,
IICIFW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _IICIFW<'a> {
w: &'a mut W,
}
impl<'a> _IICIFW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: IICIFW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "No interrupt pending"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(IICIFW::_0)
}
#[doc = "Interrupt pending"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(IICIFW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 1;
self.w.bits &= !((MASK as u8) << OFFSET);
self.w.bits |= ((value & MASK) as u8) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `RAM`"]
pub enum RAMW {
#[doc = "Not addressed"]
_0,
#[doc = "Addressed as a slave"]
_1,
}
impl RAMW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
RAMW::_0 => false,
RAMW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _RAMW<'a> {
w: &'a mut W,
}
impl<'a> _RAMW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: RAMW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Not addressed"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(RAMW::_0)
}
#[doc = "Addressed as a slave"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(RAMW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 3;
self.w.bits &= !((MASK as u8) << OFFSET);
self.w.bits |= ((value & MASK) as u8) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `ARBL`"]
pub enum ARBLW {
#[doc = "Standard bus operation."]
_0,
#[doc = "Loss of arbitration."]
_1,
}
impl ARBLW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
ARBLW::_0 => false,
ARBLW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _ARBLW<'a> {
w: &'a mut W,
}
impl<'a> _ARBLW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: ARBLW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Standard bus operation."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(ARBLW::_0)
}
#[doc = "Loss of arbitration."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(ARBLW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 4;
self.w.bits &= !((MASK as u8) << OFFSET);
self.w.bits |= ((value & MASK) as u8) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `IAAS`"]
pub enum IAASW {
#[doc = "Not addressed"]
_0,
#[doc = "Addressed as a slave"]
_1,
}
impl IAASW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
IAASW::_0 => false,
IAASW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _IAASW<'a> {
w: &'a mut W,
}
impl<'a> _IAASW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: IAASW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Not addressed"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(IAASW::_0)
}
#[doc = "Addressed as a slave"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(IAASW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 6;
self.w.bits &= !((MASK as u8) << OFFSET);
self.w.bits |= ((value & MASK) as u8) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
#[doc = "Bit 0 - Receive Acknowledge"]
#[inline]
pub fn rxak(&self) -> RXAKR {
RXAKR::_from({
const MASK: bool = true;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u8) != 0
})
}
#[doc = "Bit 1 - Interrupt Flag"]
#[inline]
pub fn iicif(&self) -> IICIFR {
IICIFR::_from({
const MASK: bool = true;
const OFFSET: u8 = 1;
((self.bits >> OFFSET) & MASK as u8) != 0
})
}
#[doc = "Bit 2 - Slave Read/Write"]
#[inline]
pub fn srw(&self) -> SRWR {
SRWR::_from({
const MASK: bool = true;
const OFFSET: u8 = 2;
((self.bits >> OFFSET) & MASK as u8) != 0
})
}
#[doc = "Bit 3 - Range Address Match"]
#[inline]
pub fn ram(&self) -> RAMR {
RAMR::_from({
const MASK: bool = true;
const OFFSET: u8 = 3;
((self.bits >> OFFSET) & MASK as u8) != 0
})
}
#[doc = "Bit 4 - Arbitration Lost"]
#[inline]
pub fn arbl(&self) -> ARBLR {
ARBLR::_from({
const MASK: bool = true;
const OFFSET: u8 = 4;
((self.bits >> OFFSET) & MASK as u8) != 0
})
}
#[doc = "Bit 5 - Bus Busy"]
#[inline]
pub fn busy(&self) -> BUSYR {
BUSYR::_from({
const MASK: bool = true;
const OFFSET: u8 = 5;
((self.bits >> OFFSET) & MASK as u8) != 0
})
}
#[doc = "Bit 6 - Addressed As A Slave"]
#[inline]
pub fn iaas(&self) -> IAASR {
IAASR::_from({
const MASK: bool = true;
const OFFSET: u8 = 6;
((self.bits >> OFFSET) & MASK as u8) != 0
})
}
#[doc = "Bit 7 - Transfer Complete Flag"]
#[inline]
pub fn tcf(&self) -> TCFR {
TCFR::_from({
const MASK: bool = true;
const OFFSET: u8 = 7;
((self.bits >> OFFSET) & MASK as u8) != 0
})
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 128 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bit 1 - Interrupt Flag"]
#[inline]
pub fn iicif(&mut self) -> _IICIFW {
_IICIFW { w: self }
}
#[doc = "Bit 3 - Range Address Match"]
#[inline]
pub fn ram(&mut self) -> _RAMW {
_RAMW { w: self }
}
#[doc = "Bit 4 - Arbitration Lost"]
#[inline]
pub fn arbl(&mut self) -> _ARBLW {
_ARBLW { w: self }
}
#[doc = "Bit 6 - Addressed As A Slave"]
#[inline]
pub fn iaas(&mut self) -> _IAASW {
_IAASW { w: self }
}
}