Struct W

pub struct W<U, REG> { /* private fields */ }

Register writer

Used as an argument to the closures in the write and modify methods of the register

Implementations

impl<U, REG> W<U, REG>

pub unsafe fn bits(&mut self, bits: U) -> &mut Self

Writes raw bits to the register

impl W<u32, Reg<u32, _THRESHOLD>>

pub fn priority(&mut self) -> PRIORITY_W<'_>

Bits 0:2

impl W<u32, Reg<u32, _TXDATA>>

pub fn data(&mut self) -> DATA_W<'_>

Bits 0:7 - Transmit data

pub fn full(&mut self) -> FULL_W<'_>

Bit 31 - Transmit FIFO full

impl W<u32, Reg<u32, _RXDATA>>

pub fn data(&mut self) -> DATA_W<'_>

Bits 0:7 - Received data

pub fn empty(&mut self) -> EMPTY_W<'_>

Bit 31 - Receive FIFO empty

impl W<u32, Reg<u32, _TXCTRL>>

pub fn txen(&mut self) -> TXEN_W<'_>

Bit 0 - Transmit enable

pub fn nstop(&mut self) -> NSTOP_W<'_>

Bit 1 - Number of stop bits

pub fn txcnt(&mut self) -> TXCNT_W<'_>

Bits 16:18 - Transmit watermark level

impl W<u32, Reg<u32, _RXCTRL>>

pub fn rxen(&mut self) -> RXEN_W<'_>

Bit 0 - Receive enable

pub fn rxcnt(&mut self) -> RXCNT_W<'_>

Bits 16:18 - Receive watermark level

impl W<u32, Reg<u32, _IE>>

pub fn txwm(&mut self) -> TXWM_W<'_>

Bit 0 - Transmit watermark interrupt enable

pub fn rxwm(&mut self) -> RXWM_W<'_>

Bit 1 - Receive watermark interrupt enable

impl W<u32, Reg<u32, _IP>>

pub fn txwm(&mut self) -> TXWM_W<'_>

Bit 0 - Transmit watermark interrupt pending

pub fn rxwm(&mut self) -> RXWM_W<'_>

Bit 1 - Receive watermark interrupt pending

impl W<u32, Reg<u32, _DIV>>

pub fn div(&mut self) -> DIV_W<'_>

Bits 0:15 - Baud rate divisor

impl W<u32, Reg<u32, _INPUT_VAL>>

pub fn pin0(&mut self) -> PIN0_W<'_>

Bit 0

pub fn pin1(&mut self) -> PIN1_W<'_>

Bit 1

pub fn pin2(&mut self) -> PIN2_W<'_>

Bit 2

pub fn pin3(&mut self) -> PIN3_W<'_>

Bit 3

pub fn pin4(&mut self) -> PIN4_W<'_>

Bit 4

pub fn pin5(&mut self) -> PIN5_W<'_>

Bit 5

pub fn pin6(&mut self) -> PIN6_W<'_>

Bit 6

pub fn pin7(&mut self) -> PIN7_W<'_>

Bit 7

pub fn pin8(&mut self) -> PIN8_W<'_>

Bit 8

pub fn pin9(&mut self) -> PIN9_W<'_>

Bit 9

pub fn pin10(&mut self) -> PIN10_W<'_>

Bit 10

pub fn pin11(&mut self) -> PIN11_W<'_>

Bit 11

pub fn pin12(&mut self) -> PIN12_W<'_>

Bit 12

pub fn pin13(&mut self) -> PIN13_W<'_>

Bit 13

pub fn pin14(&mut self) -> PIN14_W<'_>

Bit 14

pub fn pin15(&mut self) -> PIN15_W<'_>

Bit 15

pub fn pin16(&mut self) -> PIN16_W<'_>

Bit 16

pub fn pin17(&mut self) -> PIN17_W<'_>

Bit 17

pub fn pin18(&mut self) -> PIN18_W<'_>

Bit 18

pub fn pin19(&mut self) -> PIN19_W<'_>

Bit 19

pub fn pin20(&mut self) -> PIN20_W<'_>

Bit 20

pub fn pin21(&mut self) -> PIN21_W<'_>

Bit 21

pub fn pin22(&mut self) -> PIN22_W<'_>

Bit 22

pub fn pin23(&mut self) -> PIN23_W<'_>

Bit 23

pub fn pin24(&mut self) -> PIN24_W<'_>

Bit 24

pub fn pin25(&mut self) -> PIN25_W<'_>

Bit 25

pub fn pin26(&mut self) -> PIN26_W<'_>

Bit 26

pub fn pin27(&mut self) -> PIN27_W<'_>

Bit 27

pub fn pin28(&mut self) -> PIN28_W<'_>

Bit 28

pub fn pin29(&mut self) -> PIN29_W<'_>

Bit 29

pub fn pin30(&mut self) -> PIN30_W<'_>

Bit 30

pub fn pin31(&mut self) -> PIN31_W<'_>

Bit 31

impl W<u32, Reg<u32, _INPUT_EN>>

pub fn pin0(&mut self) -> PIN0_W<'_>

Bit 0

pub fn pin1(&mut self) -> PIN1_W<'_>

Bit 1

pub fn pin2(&mut self) -> PIN2_W<'_>

Bit 2

pub fn pin3(&mut self) -> PIN3_W<'_>

Bit 3

pub fn pin4(&mut self) -> PIN4_W<'_>

Bit 4

pub fn pin5(&mut self) -> PIN5_W<'_>

Bit 5

pub fn pin6(&mut self) -> PIN6_W<'_>

Bit 6

pub fn pin7(&mut self) -> PIN7_W<'_>

Bit 7

pub fn pin8(&mut self) -> PIN8_W<'_>

Bit 8

pub fn pin9(&mut self) -> PIN9_W<'_>

Bit 9

pub fn pin10(&mut self) -> PIN10_W<'_>

Bit 10

pub fn pin11(&mut self) -> PIN11_W<'_>

Bit 11

pub fn pin12(&mut self) -> PIN12_W<'_>

Bit 12

pub fn pin13(&mut self) -> PIN13_W<'_>

Bit 13

pub fn pin14(&mut self) -> PIN14_W<'_>

Bit 14

pub fn pin15(&mut self) -> PIN15_W<'_>

Bit 15

pub fn pin16(&mut self) -> PIN16_W<'_>

Bit 16

pub fn pin17(&mut self) -> PIN17_W<'_>

Bit 17

pub fn pin18(&mut self) -> PIN18_W<'_>

Bit 18

pub fn pin19(&mut self) -> PIN19_W<'_>

Bit 19

pub fn pin20(&mut self) -> PIN20_W<'_>

Bit 20

pub fn pin21(&mut self) -> PIN21_W<'_>

Bit 21

pub fn pin22(&mut self) -> PIN22_W<'_>

Bit 22

pub fn pin23(&mut self) -> PIN23_W<'_>

Bit 23

pub fn pin24(&mut self) -> PIN24_W<'_>

Bit 24

pub fn pin25(&mut self) -> PIN25_W<'_>

Bit 25

pub fn pin26(&mut self) -> PIN26_W<'_>

Bit 26

pub fn pin27(&mut self) -> PIN27_W<'_>

Bit 27

pub fn pin28(&mut self) -> PIN28_W<'_>

Bit 28

pub fn pin29(&mut self) -> PIN29_W<'_>

Bit 29

pub fn pin30(&mut self) -> PIN30_W<'_>

Bit 30

pub fn pin31(&mut self) -> PIN31_W<'_>

Bit 31

impl W<u32, Reg<u32, _OUTPUT_EN>>

pub fn pin0(&mut self) -> PIN0_W<'_>

Bit 0

pub fn pin1(&mut self) -> PIN1_W<'_>

Bit 1

pub fn pin2(&mut self) -> PIN2_W<'_>

Bit 2

pub fn pin3(&mut self) -> PIN3_W<'_>

Bit 3

pub fn pin4(&mut self) -> PIN4_W<'_>

Bit 4

pub fn pin5(&mut self) -> PIN5_W<'_>

Bit 5

pub fn pin6(&mut self) -> PIN6_W<'_>

Bit 6

pub fn pin7(&mut self) -> PIN7_W<'_>

Bit 7

pub fn pin8(&mut self) -> PIN8_W<'_>

Bit 8

pub fn pin9(&mut self) -> PIN9_W<'_>

Bit 9

pub fn pin10(&mut self) -> PIN10_W<'_>

Bit 10

pub fn pin11(&mut self) -> PIN11_W<'_>

Bit 11

pub fn pin12(&mut self) -> PIN12_W<'_>

Bit 12

pub fn pin13(&mut self) -> PIN13_W<'_>

Bit 13

pub fn pin14(&mut self) -> PIN14_W<'_>

Bit 14

pub fn pin15(&mut self) -> PIN15_W<'_>

Bit 15

pub fn pin16(&mut self) -> PIN16_W<'_>

Bit 16

pub fn pin17(&mut self) -> PIN17_W<'_>

Bit 17

pub fn pin18(&mut self) -> PIN18_W<'_>

Bit 18

pub fn pin19(&mut self) -> PIN19_W<'_>

Bit 19

pub fn pin20(&mut self) -> PIN20_W<'_>

Bit 20

pub fn pin21(&mut self) -> PIN21_W<'_>

Bit 21

pub fn pin22(&mut self) -> PIN22_W<'_>

Bit 22

pub fn pin23(&mut self) -> PIN23_W<'_>

Bit 23

pub fn pin24(&mut self) -> PIN24_W<'_>

Bit 24

pub fn pin25(&mut self) -> PIN25_W<'_>

Bit 25

pub fn pin26(&mut self) -> PIN26_W<'_>

Bit 26

pub fn pin27(&mut self) -> PIN27_W<'_>

Bit 27

pub fn pin28(&mut self) -> PIN28_W<'_>

Bit 28

pub fn pin29(&mut self) -> PIN29_W<'_>

Bit 29

pub fn pin30(&mut self) -> PIN30_W<'_>

Bit 30

pub fn pin31(&mut self) -> PIN31_W<'_>

Bit 31

impl W<u32, Reg<u32, _OUTPUT_VAL>>

pub fn pin0(&mut self) -> PIN0_W<'_>

Bit 0

pub fn pin1(&mut self) -> PIN1_W<'_>

Bit 1

pub fn pin2(&mut self) -> PIN2_W<'_>

Bit 2

pub fn pin3(&mut self) -> PIN3_W<'_>

Bit 3

pub fn pin4(&mut self) -> PIN4_W<'_>

Bit 4

pub fn pin5(&mut self) -> PIN5_W<'_>

Bit 5

pub fn pin6(&mut self) -> PIN6_W<'_>

Bit 6

pub fn pin7(&mut self) -> PIN7_W<'_>

Bit 7

pub fn pin8(&mut self) -> PIN8_W<'_>

Bit 8

pub fn pin9(&mut self) -> PIN9_W<'_>

Bit 9

pub fn pin10(&mut self) -> PIN10_W<'_>

Bit 10

pub fn pin11(&mut self) -> PIN11_W<'_>

Bit 11

pub fn pin12(&mut self) -> PIN12_W<'_>

Bit 12

pub fn pin13(&mut self) -> PIN13_W<'_>

Bit 13

pub fn pin14(&mut self) -> PIN14_W<'_>

Bit 14

pub fn pin15(&mut self) -> PIN15_W<'_>

Bit 15

pub fn pin16(&mut self) -> PIN16_W<'_>

Bit 16

pub fn pin17(&mut self) -> PIN17_W<'_>

Bit 17

pub fn pin18(&mut self) -> PIN18_W<'_>

Bit 18

pub fn pin19(&mut self) -> PIN19_W<'_>

Bit 19

pub fn pin20(&mut self) -> PIN20_W<'_>

Bit 20

pub fn pin21(&mut self) -> PIN21_W<'_>

Bit 21

pub fn pin22(&mut self) -> PIN22_W<'_>

Bit 22

pub fn pin23(&mut self) -> PIN23_W<'_>

Bit 23

pub fn pin24(&mut self) -> PIN24_W<'_>

Bit 24

pub fn pin25(&mut self) -> PIN25_W<'_>

Bit 25

pub fn pin26(&mut self) -> PIN26_W<'_>

Bit 26

pub fn pin27(&mut self) -> PIN27_W<'_>

Bit 27

pub fn pin28(&mut self) -> PIN28_W<'_>

Bit 28

pub fn pin29(&mut self) -> PIN29_W<'_>

Bit 29

pub fn pin30(&mut self) -> PIN30_W<'_>

Bit 30

pub fn pin31(&mut self) -> PIN31_W<'_>

Bit 31

impl W<u32, Reg<u32, _PULLUP_EN>>

pub fn pin0(&mut self) -> PIN0_W<'_>

Bit 0

pub fn pin1(&mut self) -> PIN1_W<'_>

Bit 1

pub fn pin2(&mut self) -> PIN2_W<'_>

Bit 2

pub fn pin3(&mut self) -> PIN3_W<'_>

Bit 3

pub fn pin4(&mut self) -> PIN4_W<'_>

Bit 4

pub fn pin5(&mut self) -> PIN5_W<'_>

Bit 5

pub fn pin6(&mut self) -> PIN6_W<'_>

Bit 6

pub fn pin7(&mut self) -> PIN7_W<'_>

Bit 7

pub fn pin8(&mut self) -> PIN8_W<'_>

Bit 8

pub fn pin9(&mut self) -> PIN9_W<'_>

Bit 9

pub fn pin10(&mut self) -> PIN10_W<'_>

Bit 10

pub fn pin11(&mut self) -> PIN11_W<'_>

Bit 11

pub fn pin12(&mut self) -> PIN12_W<'_>

Bit 12

pub fn pin13(&mut self) -> PIN13_W<'_>

Bit 13

pub fn pin14(&mut self) -> PIN14_W<'_>

Bit 14

pub fn pin15(&mut self) -> PIN15_W<'_>

Bit 15

pub fn pin16(&mut self) -> PIN16_W<'_>

Bit 16

pub fn pin17(&mut self) -> PIN17_W<'_>

Bit 17

pub fn pin18(&mut self) -> PIN18_W<'_>

Bit 18

pub fn pin19(&mut self) -> PIN19_W<'_>

Bit 19

pub fn pin20(&mut self) -> PIN20_W<'_>

Bit 20

pub fn pin21(&mut self) -> PIN21_W<'_>

Bit 21

pub fn pin22(&mut self) -> PIN22_W<'_>

Bit 22

pub fn pin23(&mut self) -> PIN23_W<'_>

Bit 23

pub fn pin24(&mut self) -> PIN24_W<'_>

Bit 24

pub fn pin25(&mut self) -> PIN25_W<'_>

Bit 25

pub fn pin26(&mut self) -> PIN26_W<'_>

Bit 26

pub fn pin27(&mut self) -> PIN27_W<'_>

Bit 27

pub fn pin28(&mut self) -> PIN28_W<'_>

Bit 28

pub fn pin29(&mut self) -> PIN29_W<'_>

Bit 29

pub fn pin30(&mut self) -> PIN30_W<'_>

Bit 30

pub fn pin31(&mut self) -> PIN31_W<'_>

Bit 31

impl W<u32, Reg<u32, _DRIVE>>

pub fn pin0(&mut self) -> PIN0_W<'_>

Bit 0

pub fn pin1(&mut self) -> PIN1_W<'_>

Bit 1

pub fn pin2(&mut self) -> PIN2_W<'_>

Bit 2

pub fn pin3(&mut self) -> PIN3_W<'_>

Bit 3

pub fn pin4(&mut self) -> PIN4_W<'_>

Bit 4

pub fn pin5(&mut self) -> PIN5_W<'_>

Bit 5

pub fn pin6(&mut self) -> PIN6_W<'_>

Bit 6

pub fn pin7(&mut self) -> PIN7_W<'_>

Bit 7

pub fn pin8(&mut self) -> PIN8_W<'_>

Bit 8

pub fn pin9(&mut self) -> PIN9_W<'_>

Bit 9

pub fn pin10(&mut self) -> PIN10_W<'_>

Bit 10

pub fn pin11(&mut self) -> PIN11_W<'_>

Bit 11

pub fn pin12(&mut self) -> PIN12_W<'_>

Bit 12

pub fn pin13(&mut self) -> PIN13_W<'_>

Bit 13

pub fn pin14(&mut self) -> PIN14_W<'_>

Bit 14

pub fn pin15(&mut self) -> PIN15_W<'_>

Bit 15

pub fn pin16(&mut self) -> PIN16_W<'_>

Bit 16

pub fn pin17(&mut self) -> PIN17_W<'_>

Bit 17

pub fn pin18(&mut self) -> PIN18_W<'_>

Bit 18

pub fn pin19(&mut self) -> PIN19_W<'_>

Bit 19

pub fn pin20(&mut self) -> PIN20_W<'_>

Bit 20

pub fn pin21(&mut self) -> PIN21_W<'_>

Bit 21

pub fn pin22(&mut self) -> PIN22_W<'_>

Bit 22

pub fn pin23(&mut self) -> PIN23_W<'_>

Bit 23

pub fn pin24(&mut self) -> PIN24_W<'_>

Bit 24

pub fn pin25(&mut self) -> PIN25_W<'_>

Bit 25

pub fn pin26(&mut self) -> PIN26_W<'_>

Bit 26

pub fn pin27(&mut self) -> PIN27_W<'_>

Bit 27

pub fn pin28(&mut self) -> PIN28_W<'_>

Bit 28

pub fn pin29(&mut self) -> PIN29_W<'_>

Bit 29

pub fn pin30(&mut self) -> PIN30_W<'_>

Bit 30

pub fn pin31(&mut self) -> PIN31_W<'_>

Bit 31

impl W<u32, Reg<u32, _RISE_IE>>

pub fn pin0(&mut self) -> PIN0_W<'_>

Bit 0

pub fn pin1(&mut self) -> PIN1_W<'_>

Bit 1

pub fn pin2(&mut self) -> PIN2_W<'_>

Bit 2

pub fn pin3(&mut self) -> PIN3_W<'_>

Bit 3

pub fn pin4(&mut self) -> PIN4_W<'_>

Bit 4

pub fn pin5(&mut self) -> PIN5_W<'_>

Bit 5

pub fn pin6(&mut self) -> PIN6_W<'_>

Bit 6

pub fn pin7(&mut self) -> PIN7_W<'_>

Bit 7

pub fn pin8(&mut self) -> PIN8_W<'_>

Bit 8

pub fn pin9(&mut self) -> PIN9_W<'_>

Bit 9

pub fn pin10(&mut self) -> PIN10_W<'_>

Bit 10

pub fn pin11(&mut self) -> PIN11_W<'_>

Bit 11

pub fn pin12(&mut self) -> PIN12_W<'_>

Bit 12

pub fn pin13(&mut self) -> PIN13_W<'_>

Bit 13

pub fn pin14(&mut self) -> PIN14_W<'_>

Bit 14

pub fn pin15(&mut self) -> PIN15_W<'_>

Bit 15

pub fn pin16(&mut self) -> PIN16_W<'_>

Bit 16

pub fn pin17(&mut self) -> PIN17_W<'_>

Bit 17

pub fn pin18(&mut self) -> PIN18_W<'_>

Bit 18

pub fn pin19(&mut self) -> PIN19_W<'_>

Bit 19

pub fn pin20(&mut self) -> PIN20_W<'_>

Bit 20

pub fn pin21(&mut self) -> PIN21_W<'_>

Bit 21

pub fn pin22(&mut self) -> PIN22_W<'_>

Bit 22

pub fn pin23(&mut self) -> PIN23_W<'_>

Bit 23

pub fn pin24(&mut self) -> PIN24_W<'_>

Bit 24

pub fn pin25(&mut self) -> PIN25_W<'_>

Bit 25

pub fn pin26(&mut self) -> PIN26_W<'_>

Bit 26

pub fn pin27(&mut self) -> PIN27_W<'_>

Bit 27

pub fn pin28(&mut self) -> PIN28_W<'_>

Bit 28

pub fn pin29(&mut self) -> PIN29_W<'_>

Bit 29

pub fn pin30(&mut self) -> PIN30_W<'_>

Bit 30

pub fn pin31(&mut self) -> PIN31_W<'_>

Bit 31

impl W<u32, Reg<u32, _RISE_IP>>

pub fn pin0(&mut self) -> PIN0_W<'_>

Bit 0

pub fn pin1(&mut self) -> PIN1_W<'_>

Bit 1

pub fn pin2(&mut self) -> PIN2_W<'_>

Bit 2

pub fn pin3(&mut self) -> PIN3_W<'_>

Bit 3

pub fn pin4(&mut self) -> PIN4_W<'_>

Bit 4

pub fn pin5(&mut self) -> PIN5_W<'_>

Bit 5

pub fn pin6(&mut self) -> PIN6_W<'_>

Bit 6

pub fn pin7(&mut self) -> PIN7_W<'_>

Bit 7

pub fn pin8(&mut self) -> PIN8_W<'_>

Bit 8

pub fn pin9(&mut self) -> PIN9_W<'_>

Bit 9

pub fn pin10(&mut self) -> PIN10_W<'_>

Bit 10

pub fn pin11(&mut self) -> PIN11_W<'_>

Bit 11

pub fn pin12(&mut self) -> PIN12_W<'_>

Bit 12

pub fn pin13(&mut self) -> PIN13_W<'_>

Bit 13

pub fn pin14(&mut self) -> PIN14_W<'_>

Bit 14

pub fn pin15(&mut self) -> PIN15_W<'_>

Bit 15

pub fn pin16(&mut self) -> PIN16_W<'_>

Bit 16

pub fn pin17(&mut self) -> PIN17_W<'_>

Bit 17

pub fn pin18(&mut self) -> PIN18_W<'_>

Bit 18

pub fn pin19(&mut self) -> PIN19_W<'_>

Bit 19

pub fn pin20(&mut self) -> PIN20_W<'_>

Bit 20

pub fn pin21(&mut self) -> PIN21_W<'_>

Bit 21

pub fn pin22(&mut self) -> PIN22_W<'_>

Bit 22

pub fn pin23(&mut self) -> PIN23_W<'_>

Bit 23

pub fn pin24(&mut self) -> PIN24_W<'_>

Bit 24

pub fn pin25(&mut self) -> PIN25_W<'_>

Bit 25

pub fn pin26(&mut self) -> PIN26_W<'_>

Bit 26

pub fn pin27(&mut self) -> PIN27_W<'_>

Bit 27

pub fn pin28(&mut self) -> PIN28_W<'_>

Bit 28

pub fn pin29(&mut self) -> PIN29_W<'_>

Bit 29

pub fn pin30(&mut self) -> PIN30_W<'_>

Bit 30

pub fn pin31(&mut self) -> PIN31_W<'_>

Bit 31

impl W<u32, Reg<u32, _FALL_IE>>

pub fn pin0(&mut self) -> PIN0_W<'_>

Bit 0

pub fn pin1(&mut self) -> PIN1_W<'_>

Bit 1

pub fn pin2(&mut self) -> PIN2_W<'_>

Bit 2

pub fn pin3(&mut self) -> PIN3_W<'_>

Bit 3

pub fn pin4(&mut self) -> PIN4_W<'_>

Bit 4

pub fn pin5(&mut self) -> PIN5_W<'_>

Bit 5

pub fn pin6(&mut self) -> PIN6_W<'_>

Bit 6

pub fn pin7(&mut self) -> PIN7_W<'_>

Bit 7

pub fn pin8(&mut self) -> PIN8_W<'_>

Bit 8

pub fn pin9(&mut self) -> PIN9_W<'_>

Bit 9

pub fn pin10(&mut self) -> PIN10_W<'_>

Bit 10

pub fn pin11(&mut self) -> PIN11_W<'_>

Bit 11

pub fn pin12(&mut self) -> PIN12_W<'_>

Bit 12

pub fn pin13(&mut self) -> PIN13_W<'_>

Bit 13

pub fn pin14(&mut self) -> PIN14_W<'_>

Bit 14

pub fn pin15(&mut self) -> PIN15_W<'_>

Bit 15

pub fn pin16(&mut self) -> PIN16_W<'_>

Bit 16

pub fn pin17(&mut self) -> PIN17_W<'_>

Bit 17

pub fn pin18(&mut self) -> PIN18_W<'_>

Bit 18

pub fn pin19(&mut self) -> PIN19_W<'_>

Bit 19

pub fn pin20(&mut self) -> PIN20_W<'_>

Bit 20

pub fn pin21(&mut self) -> PIN21_W<'_>

Bit 21

pub fn pin22(&mut self) -> PIN22_W<'_>

Bit 22

pub fn pin23(&mut self) -> PIN23_W<'_>

Bit 23

pub fn pin24(&mut self) -> PIN24_W<'_>

Bit 24

pub fn pin25(&mut self) -> PIN25_W<'_>

Bit 25

pub fn pin26(&mut self) -> PIN26_W<'_>

Bit 26

pub fn pin27(&mut self) -> PIN27_W<'_>

Bit 27

pub fn pin28(&mut self) -> PIN28_W<'_>

Bit 28

pub fn pin29(&mut self) -> PIN29_W<'_>

Bit 29

pub fn pin30(&mut self) -> PIN30_W<'_>

Bit 30

pub fn pin31(&mut self) -> PIN31_W<'_>

Bit 31

impl W<u32, Reg<u32, _FALL_IP>>

pub fn pin0(&mut self) -> PIN0_W<'_>

Bit 0

pub fn pin1(&mut self) -> PIN1_W<'_>

Bit 1

pub fn pin2(&mut self) -> PIN2_W<'_>

Bit 2

pub fn pin3(&mut self) -> PIN3_W<'_>

Bit 3

pub fn pin4(&mut self) -> PIN4_W<'_>

Bit 4

pub fn pin5(&mut self) -> PIN5_W<'_>

Bit 5

pub fn pin6(&mut self) -> PIN6_W<'_>

Bit 6

pub fn pin7(&mut self) -> PIN7_W<'_>

Bit 7

pub fn pin8(&mut self) -> PIN8_W<'_>

Bit 8

pub fn pin9(&mut self) -> PIN9_W<'_>

Bit 9

pub fn pin10(&mut self) -> PIN10_W<'_>

Bit 10

pub fn pin11(&mut self) -> PIN11_W<'_>

Bit 11

pub fn pin12(&mut self) -> PIN12_W<'_>

Bit 12

pub fn pin13(&mut self) -> PIN13_W<'_>

Bit 13

pub fn pin14(&mut self) -> PIN14_W<'_>

Bit 14

pub fn pin15(&mut self) -> PIN15_W<'_>

Bit 15

pub fn pin16(&mut self) -> PIN16_W<'_>

Bit 16

pub fn pin17(&mut self) -> PIN17_W<'_>

Bit 17

pub fn pin18(&mut self) -> PIN18_W<'_>

Bit 18

pub fn pin19(&mut self) -> PIN19_W<'_>

Bit 19

pub fn pin20(&mut self) -> PIN20_W<'_>

Bit 20

pub fn pin21(&mut self) -> PIN21_W<'_>

Bit 21

pub fn pin22(&mut self) -> PIN22_W<'_>

Bit 22

pub fn pin23(&mut self) -> PIN23_W<'_>

Bit 23

pub fn pin24(&mut self) -> PIN24_W<'_>

Bit 24

pub fn pin25(&mut self) -> PIN25_W<'_>

Bit 25

pub fn pin26(&mut self) -> PIN26_W<'_>

Bit 26

pub fn pin27(&mut self) -> PIN27_W<'_>

Bit 27

pub fn pin28(&mut self) -> PIN28_W<'_>

Bit 28

pub fn pin29(&mut self) -> PIN29_W<'_>

Bit 29

pub fn pin30(&mut self) -> PIN30_W<'_>

Bit 30

pub fn pin31(&mut self) -> PIN31_W<'_>

Bit 31

impl W<u32, Reg<u32, _HIGH_IE>>

pub fn pin0(&mut self) -> PIN0_W<'_>

Bit 0

pub fn pin1(&mut self) -> PIN1_W<'_>

Bit 1

pub fn pin2(&mut self) -> PIN2_W<'_>

Bit 2

pub fn pin3(&mut self) -> PIN3_W<'_>

Bit 3

pub fn pin4(&mut self) -> PIN4_W<'_>

Bit 4

pub fn pin5(&mut self) -> PIN5_W<'_>

Bit 5

pub fn pin6(&mut self) -> PIN6_W<'_>

Bit 6

pub fn pin7(&mut self) -> PIN7_W<'_>

Bit 7

pub fn pin8(&mut self) -> PIN8_W<'_>

Bit 8

pub fn pin9(&mut self) -> PIN9_W<'_>

Bit 9

pub fn pin10(&mut self) -> PIN10_W<'_>

Bit 10

pub fn pin11(&mut self) -> PIN11_W<'_>

Bit 11

pub fn pin12(&mut self) -> PIN12_W<'_>

Bit 12

pub fn pin13(&mut self) -> PIN13_W<'_>

Bit 13

pub fn pin14(&mut self) -> PIN14_W<'_>

Bit 14

pub fn pin15(&mut self) -> PIN15_W<'_>

Bit 15

pub fn pin16(&mut self) -> PIN16_W<'_>

Bit 16

pub fn pin17(&mut self) -> PIN17_W<'_>

Bit 17

pub fn pin18(&mut self) -> PIN18_W<'_>

Bit 18

pub fn pin19(&mut self) -> PIN19_W<'_>

Bit 19

pub fn pin20(&mut self) -> PIN20_W<'_>

Bit 20

pub fn pin21(&mut self) -> PIN21_W<'_>

Bit 21

pub fn pin22(&mut self) -> PIN22_W<'_>

Bit 22

pub fn pin23(&mut self) -> PIN23_W<'_>

Bit 23

pub fn pin24(&mut self) -> PIN24_W<'_>

Bit 24

pub fn pin25(&mut self) -> PIN25_W<'_>

Bit 25

pub fn pin26(&mut self) -> PIN26_W<'_>

Bit 26

pub fn pin27(&mut self) -> PIN27_W<'_>

Bit 27

pub fn pin28(&mut self) -> PIN28_W<'_>

Bit 28

pub fn pin29(&mut self) -> PIN29_W<'_>

Bit 29

pub fn pin30(&mut self) -> PIN30_W<'_>

Bit 30

pub fn pin31(&mut self) -> PIN31_W<'_>

Bit 31

impl W<u32, Reg<u32, _HIGH_IP>>

pub fn pin0(&mut self) -> PIN0_W<'_>

Bit 0

pub fn pin1(&mut self) -> PIN1_W<'_>

Bit 1

pub fn pin2(&mut self) -> PIN2_W<'_>

Bit 2

pub fn pin3(&mut self) -> PIN3_W<'_>

Bit 3

pub fn pin4(&mut self) -> PIN4_W<'_>

Bit 4

pub fn pin5(&mut self) -> PIN5_W<'_>

Bit 5

pub fn pin6(&mut self) -> PIN6_W<'_>

Bit 6

pub fn pin7(&mut self) -> PIN7_W<'_>

Bit 7

pub fn pin8(&mut self) -> PIN8_W<'_>

Bit 8

pub fn pin9(&mut self) -> PIN9_W<'_>

Bit 9

pub fn pin10(&mut self) -> PIN10_W<'_>

Bit 10

pub fn pin11(&mut self) -> PIN11_W<'_>

Bit 11

pub fn pin12(&mut self) -> PIN12_W<'_>

Bit 12

pub fn pin13(&mut self) -> PIN13_W<'_>

Bit 13

pub fn pin14(&mut self) -> PIN14_W<'_>

Bit 14

pub fn pin15(&mut self) -> PIN15_W<'_>

Bit 15

pub fn pin16(&mut self) -> PIN16_W<'_>

Bit 16

pub fn pin17(&mut self) -> PIN17_W<'_>

Bit 17

pub fn pin18(&mut self) -> PIN18_W<'_>

Bit 18

pub fn pin19(&mut self) -> PIN19_W<'_>

Bit 19

pub fn pin20(&mut self) -> PIN20_W<'_>

Bit 20

pub fn pin21(&mut self) -> PIN21_W<'_>

Bit 21

pub fn pin22(&mut self) -> PIN22_W<'_>

Bit 22

pub fn pin23(&mut self) -> PIN23_W<'_>

Bit 23

pub fn pin24(&mut self) -> PIN24_W<'_>

Bit 24

pub fn pin25(&mut self) -> PIN25_W<'_>

Bit 25

pub fn pin26(&mut self) -> PIN26_W<'_>

Bit 26

pub fn pin27(&mut self) -> PIN27_W<'_>

Bit 27

pub fn pin28(&mut self) -> PIN28_W<'_>

Bit 28

pub fn pin29(&mut self) -> PIN29_W<'_>

Bit 29

pub fn pin30(&mut self) -> PIN30_W<'_>

Bit 30

pub fn pin31(&mut self) -> PIN31_W<'_>

Bit 31

impl W<u32, Reg<u32, _LOW_IE>>

pub fn pin0(&mut self) -> PIN0_W<'_>

Bit 0

pub fn pin1(&mut self) -> PIN1_W<'_>

Bit 1

pub fn pin2(&mut self) -> PIN2_W<'_>

Bit 2

pub fn pin3(&mut self) -> PIN3_W<'_>

Bit 3

pub fn pin4(&mut self) -> PIN4_W<'_>

Bit 4

pub fn pin5(&mut self) -> PIN5_W<'_>

Bit 5

pub fn pin6(&mut self) -> PIN6_W<'_>

Bit 6

pub fn pin7(&mut self) -> PIN7_W<'_>

Bit 7

pub fn pin8(&mut self) -> PIN8_W<'_>

Bit 8

pub fn pin9(&mut self) -> PIN9_W<'_>

Bit 9

pub fn pin10(&mut self) -> PIN10_W<'_>

Bit 10

pub fn pin11(&mut self) -> PIN11_W<'_>

Bit 11

pub fn pin12(&mut self) -> PIN12_W<'_>

Bit 12

pub fn pin13(&mut self) -> PIN13_W<'_>

Bit 13

pub fn pin14(&mut self) -> PIN14_W<'_>

Bit 14

pub fn pin15(&mut self) -> PIN15_W<'_>

Bit 15

pub fn pin16(&mut self) -> PIN16_W<'_>

Bit 16

pub fn pin17(&mut self) -> PIN17_W<'_>

Bit 17

pub fn pin18(&mut self) -> PIN18_W<'_>

Bit 18

pub fn pin19(&mut self) -> PIN19_W<'_>

Bit 19

pub fn pin20(&mut self) -> PIN20_W<'_>

Bit 20

pub fn pin21(&mut self) -> PIN21_W<'_>

Bit 21

pub fn pin22(&mut self) -> PIN22_W<'_>

Bit 22

pub fn pin23(&mut self) -> PIN23_W<'_>

Bit 23

pub fn pin24(&mut self) -> PIN24_W<'_>

Bit 24

pub fn pin25(&mut self) -> PIN25_W<'_>

Bit 25

pub fn pin26(&mut self) -> PIN26_W<'_>

Bit 26

pub fn pin27(&mut self) -> PIN27_W<'_>

Bit 27

pub fn pin28(&mut self) -> PIN28_W<'_>

Bit 28

pub fn pin29(&mut self) -> PIN29_W<'_>

Bit 29

pub fn pin30(&mut self) -> PIN30_W<'_>

Bit 30

pub fn pin31(&mut self) -> PIN31_W<'_>

Bit 31

impl W<u32, Reg<u32, _LOW_IP>>

pub fn pin0(&mut self) -> PIN0_W<'_>

Bit 0

pub fn pin1(&mut self) -> PIN1_W<'_>

Bit 1

pub fn pin2(&mut self) -> PIN2_W<'_>

Bit 2

pub fn pin3(&mut self) -> PIN3_W<'_>

Bit 3

pub fn pin4(&mut self) -> PIN4_W<'_>

Bit 4

pub fn pin5(&mut self) -> PIN5_W<'_>

Bit 5

pub fn pin6(&mut self) -> PIN6_W<'_>

Bit 6

pub fn pin7(&mut self) -> PIN7_W<'_>

Bit 7

pub fn pin8(&mut self) -> PIN8_W<'_>

Bit 8

pub fn pin9(&mut self) -> PIN9_W<'_>

Bit 9

pub fn pin10(&mut self) -> PIN10_W<'_>

Bit 10

pub fn pin11(&mut self) -> PIN11_W<'_>

Bit 11

pub fn pin12(&mut self) -> PIN12_W<'_>

Bit 12

pub fn pin13(&mut self) -> PIN13_W<'_>

Bit 13

pub fn pin14(&mut self) -> PIN14_W<'_>

Bit 14

pub fn pin15(&mut self) -> PIN15_W<'_>

Bit 15

pub fn pin16(&mut self) -> PIN16_W<'_>

Bit 16

pub fn pin17(&mut self) -> PIN17_W<'_>

Bit 17

pub fn pin18(&mut self) -> PIN18_W<'_>

Bit 18

pub fn pin19(&mut self) -> PIN19_W<'_>

Bit 19

pub fn pin20(&mut self) -> PIN20_W<'_>

Bit 20

pub fn pin21(&mut self) -> PIN21_W<'_>

Bit 21

pub fn pin22(&mut self) -> PIN22_W<'_>

Bit 22

pub fn pin23(&mut self) -> PIN23_W<'_>

Bit 23

pub fn pin24(&mut self) -> PIN24_W<'_>

Bit 24

pub fn pin25(&mut self) -> PIN25_W<'_>

Bit 25

pub fn pin26(&mut self) -> PIN26_W<'_>

Bit 26

pub fn pin27(&mut self) -> PIN27_W<'_>

Bit 27

pub fn pin28(&mut self) -> PIN28_W<'_>

Bit 28

pub fn pin29(&mut self) -> PIN29_W<'_>

Bit 29

pub fn pin30(&mut self) -> PIN30_W<'_>

Bit 30

pub fn pin31(&mut self) -> PIN31_W<'_>

Bit 31

impl W<u32, Reg<u32, _IOF_EN>>

pub fn pin0(&mut self) -> PIN0_W<'_>

Bit 0

pub fn pin1(&mut self) -> PIN1_W<'_>

Bit 1

pub fn pin2(&mut self) -> PIN2_W<'_>

Bit 2

pub fn pin3(&mut self) -> PIN3_W<'_>

Bit 3

pub fn pin4(&mut self) -> PIN4_W<'_>

Bit 4

pub fn pin5(&mut self) -> PIN5_W<'_>

Bit 5

pub fn pin6(&mut self) -> PIN6_W<'_>

Bit 6

pub fn pin7(&mut self) -> PIN7_W<'_>

Bit 7

pub fn pin8(&mut self) -> PIN8_W<'_>

Bit 8

pub fn pin9(&mut self) -> PIN9_W<'_>

Bit 9

pub fn pin10(&mut self) -> PIN10_W<'_>

Bit 10

pub fn pin11(&mut self) -> PIN11_W<'_>

Bit 11

pub fn pin12(&mut self) -> PIN12_W<'_>

Bit 12

pub fn pin13(&mut self) -> PIN13_W<'_>

Bit 13

pub fn pin14(&mut self) -> PIN14_W<'_>

Bit 14

pub fn pin15(&mut self) -> PIN15_W<'_>

Bit 15

pub fn pin16(&mut self) -> PIN16_W<'_>

Bit 16

pub fn pin17(&mut self) -> PIN17_W<'_>

Bit 17

pub fn pin18(&mut self) -> PIN18_W<'_>

Bit 18

pub fn pin19(&mut self) -> PIN19_W<'_>

Bit 19

pub fn pin20(&mut self) -> PIN20_W<'_>

Bit 20

pub fn pin21(&mut self) -> PIN21_W<'_>

Bit 21

pub fn pin22(&mut self) -> PIN22_W<'_>

Bit 22

pub fn pin23(&mut self) -> PIN23_W<'_>

Bit 23

pub fn pin24(&mut self) -> PIN24_W<'_>

Bit 24

pub fn pin25(&mut self) -> PIN25_W<'_>

Bit 25

pub fn pin26(&mut self) -> PIN26_W<'_>

Bit 26

pub fn pin27(&mut self) -> PIN27_W<'_>

Bit 27

pub fn pin28(&mut self) -> PIN28_W<'_>

Bit 28

pub fn pin29(&mut self) -> PIN29_W<'_>

Bit 29

pub fn pin30(&mut self) -> PIN30_W<'_>

Bit 30

pub fn pin31(&mut self) -> PIN31_W<'_>

Bit 31

impl W<u32, Reg<u32, _IOF_SEL>>

pub fn pin0(&mut self) -> PIN0_W<'_>

Bit 0

pub fn pin1(&mut self) -> PIN1_W<'_>

Bit 1

pub fn pin2(&mut self) -> PIN2_W<'_>

Bit 2

pub fn pin3(&mut self) -> PIN3_W<'_>

Bit 3

pub fn pin4(&mut self) -> PIN4_W<'_>

Bit 4

pub fn pin5(&mut self) -> PIN5_W<'_>

Bit 5

pub fn pin6(&mut self) -> PIN6_W<'_>

Bit 6

pub fn pin7(&mut self) -> PIN7_W<'_>

Bit 7

pub fn pin8(&mut self) -> PIN8_W<'_>

Bit 8

pub fn pin9(&mut self) -> PIN9_W<'_>

Bit 9

pub fn pin10(&mut self) -> PIN10_W<'_>

Bit 10

pub fn pin11(&mut self) -> PIN11_W<'_>

Bit 11

pub fn pin12(&mut self) -> PIN12_W<'_>

Bit 12

pub fn pin13(&mut self) -> PIN13_W<'_>

Bit 13

pub fn pin14(&mut self) -> PIN14_W<'_>

Bit 14

pub fn pin15(&mut self) -> PIN15_W<'_>

Bit 15

pub fn pin16(&mut self) -> PIN16_W<'_>

Bit 16

pub fn pin17(&mut self) -> PIN17_W<'_>

Bit 17

pub fn pin18(&mut self) -> PIN18_W<'_>

Bit 18

pub fn pin19(&mut self) -> PIN19_W<'_>

Bit 19

pub fn pin20(&mut self) -> PIN20_W<'_>

Bit 20

pub fn pin21(&mut self) -> PIN21_W<'_>

Bit 21

pub fn pin22(&mut self) -> PIN22_W<'_>

Bit 22

pub fn pin23(&mut self) -> PIN23_W<'_>

Bit 23

pub fn pin24(&mut self) -> PIN24_W<'_>

Bit 24

pub fn pin25(&mut self) -> PIN25_W<'_>

Bit 25

pub fn pin26(&mut self) -> PIN26_W<'_>

Bit 26

pub fn pin27(&mut self) -> PIN27_W<'_>

Bit 27

pub fn pin28(&mut self) -> PIN28_W<'_>

Bit 28

pub fn pin29(&mut self) -> PIN29_W<'_>

Bit 29

pub fn pin30(&mut self) -> PIN30_W<'_>

Bit 30

pub fn pin31(&mut self) -> PIN31_W<'_>

Bit 31

impl W<u32, Reg<u32, _OUTPUT_XOR>>

pub fn pin0(&mut self) -> PIN0_W<'_>

Bit 0

pub fn pin1(&mut self) -> PIN1_W<'_>

Bit 1

pub fn pin2(&mut self) -> PIN2_W<'_>

Bit 2

pub fn pin3(&mut self) -> PIN3_W<'_>

Bit 3

pub fn pin4(&mut self) -> PIN4_W<'_>

Bit 4

pub fn pin5(&mut self) -> PIN5_W<'_>

Bit 5

pub fn pin6(&mut self) -> PIN6_W<'_>

Bit 6

pub fn pin7(&mut self) -> PIN7_W<'_>

Bit 7

pub fn pin8(&mut self) -> PIN8_W<'_>

Bit 8

pub fn pin9(&mut self) -> PIN9_W<'_>

Bit 9

pub fn pin10(&mut self) -> PIN10_W<'_>

Bit 10

pub fn pin11(&mut self) -> PIN11_W<'_>

Bit 11

pub fn pin12(&mut self) -> PIN12_W<'_>

Bit 12

pub fn pin13(&mut self) -> PIN13_W<'_>

Bit 13

pub fn pin14(&mut self) -> PIN14_W<'_>

Bit 14

pub fn pin15(&mut self) -> PIN15_W<'_>

Bit 15

pub fn pin16(&mut self) -> PIN16_W<'_>

Bit 16

pub fn pin17(&mut self) -> PIN17_W<'_>

Bit 17

pub fn pin18(&mut self) -> PIN18_W<'_>

Bit 18

pub fn pin19(&mut self) -> PIN19_W<'_>

Bit 19

pub fn pin20(&mut self) -> PIN20_W<'_>

Bit 20

pub fn pin21(&mut self) -> PIN21_W<'_>

Bit 21

pub fn pin22(&mut self) -> PIN22_W<'_>

Bit 22

pub fn pin23(&mut self) -> PIN23_W<'_>

Bit 23

pub fn pin24(&mut self) -> PIN24_W<'_>

Bit 24

pub fn pin25(&mut self) -> PIN25_W<'_>

Bit 25

pub fn pin26(&mut self) -> PIN26_W<'_>

Bit 26

pub fn pin27(&mut self) -> PIN27_W<'_>

Bit 27

pub fn pin28(&mut self) -> PIN28_W<'_>

Bit 28

pub fn pin29(&mut self) -> PIN29_W<'_>

Bit 29

pub fn pin30(&mut self) -> PIN30_W<'_>

Bit 30

pub fn pin31(&mut self) -> PIN31_W<'_>

Bit 31

impl W<u64, Reg<u64, _INTERRUPT_STATUS>>

pub fn calc_done(&mut self) -> CALC_DONE_W<'_>

Bit 0 - Interrupt raised when calculation is done

pub fn layer_cfg_almost_empty(&mut self) -> LAYER_CFG_ALMOST_EMPTY_W<'_>

Bit 1 - Interrupt raised when layer arguments FIFO almost empty

pub fn layer_cfg_almost_full(&mut self) -> LAYER_CFG_ALMOST_FULL_W<'_>

Bit 2 - Interrupt raised when layer arguments FIFO almost full

impl W<u64, Reg<u64, _INTERRUPT_RAW>>

pub fn calc_done(&mut self) -> CALC_DONE_W<'_>

Bit 0 - Interrupt raised when calculation is done

pub fn layer_cfg_almost_empty(&mut self) -> LAYER_CFG_ALMOST_EMPTY_W<'_>

Bit 1 - Interrupt raised when layer arguments FIFO almost empty

pub fn layer_cfg_almost_full(&mut self) -> LAYER_CFG_ALMOST_FULL_W<'_>

Bit 2 - Interrupt raised when layer arguments FIFO almost full

impl W<u64, Reg<u64, _INTERRUPT_MASK>>

pub fn calc_done(&mut self) -> CALC_DONE_W<'_>

Bit 0 - Interrupt raised when calculation is done

pub fn layer_cfg_almost_empty(&mut self) -> LAYER_CFG_ALMOST_EMPTY_W<'_>

Bit 1 - Interrupt raised when layer arguments FIFO almost empty

pub fn layer_cfg_almost_full(&mut self) -> LAYER_CFG_ALMOST_FULL_W<'_>

Bit 2 - Interrupt raised when layer arguments FIFO almost full

impl W<u64, Reg<u64, _INTERRUPT_CLEAR>>

pub fn calc_done(&mut self) -> CALC_DONE_W<'_>

Bit 0 - Interrupt raised when calculation is done

pub fn layer_cfg_almost_empty(&mut self) -> LAYER_CFG_ALMOST_EMPTY_W<'_>

Bit 1 - Interrupt raised when layer arguments FIFO almost empty

pub fn layer_cfg_almost_full(&mut self) -> LAYER_CFG_ALMOST_FULL_W<'_>

Bit 2 - Interrupt raised when layer arguments FIFO almost full

impl W<u64, Reg<u64, _FIFO_THRESHOLD>>

pub fn full_threshold(&mut self) -> FULL_THRESHOLD_W<'_>

Bits 0:3 - FIFO full threshold

pub fn empty_threshold(&mut self) -> EMPTY_THRESHOLD_W<'_>

Bits 4:7 - FIFO empty threshold

impl W<u64, Reg<u64, _FIFO_CTRL>>

pub fn dma_fifo_flush_n(&mut self) -> DMA_FIFO_FLUSH_N_W<'_>

Bit 0 - Flush DMA FIFO

pub fn gs_fifo_flush_n(&mut self) -> GS_FIFO_FLUSH_N_W<'_>

Bit 1 - Flush GS FIFO

pub fn cfg_fifo_flush_n(&mut self) -> CFG_FIFO_FLUSH_N_W<'_>

Bit 2 - Flush configuration FIFO

pub fn cmd_fifo_flush_n(&mut self) -> CMD_FIFO_FLUSH_N_W<'_>

Bit 3 - Flush command FIFO

pub fn resp_fifo_flush_n(&mut self) -> RESP_FIFO_FLUSH_N_W<'_>

Bit 4 - Flush response FIFO

impl W<u64, Reg<u64, _EIGHT_BIT_MODE>>

pub fn eight_bit_mode(&mut self) -> EIGHT_BIT_MODE_W<'_>

Bit 0 - Use 8-bit instead of 16-bit precision if set

impl W<u64, Reg<u64, _CTRL>>

pub fn point(&mut self) -> POINT_W<'_>

Bits 0:2 - FFT calculation data length

pub fn mode(&mut self) -> MODE_W<'_>

Bit 3 - FFT mode

pub fn shift(&mut self) -> SHIFT_W<'_>

Bits 4:12 - Corresponding to the nine layer butterfly shift operation, 0x0: does not shift; 0x1: shift 1st layer. …

pub fn enable(&mut self) -> ENABLE_W<'_>

Bit 13 - FFT enable

pub fn dma_send(&mut self) -> DMA_SEND_W<'_>

Bit 14 - FFT DMA enable

pub fn input_mode(&mut self) -> INPUT_MODE_W<'_>

Bits 15:16 - Input data arrangement

pub fn data_mode(&mut self) -> DATA_MODE_W<'_>

Bit 17 - Effective width of input data

impl W<u64, Reg<u64, _FIFO_CTRL>>

pub fn resp_fifo_flush(&mut self) -> RESP_FIFO_FLUSH_W<'_>

Bit 0 - Response memory initialization flag

pub fn cmd_fifo_flush(&mut self) -> CMD_FIFO_FLUSH_W<'_>

Bit 1 - Command memory initialization flag

pub fn gs_fifo_flush(&mut self) -> GS_FIFO_FLUSH_W<'_>

Bit 2 - Output interface memory initialization flag

impl W<u64, Reg<u64, _INTERRUPTMASK>>

pub fn fft_done(&mut self) -> FFT_DONE_W<'_>

Bit 0 - FFT done

impl W<u64, Reg<u64, _INTR_CLEAR>>

pub fn fft_done(&mut self) -> FFT_DONE_W<'_>

Bit 0 - FFT done

impl W<u64, Reg<u64, _STATUS>>

pub fn fft_done(&mut self) -> FFT_DONE_W<'_>

Bit 0 - FFT done

impl W<u64, Reg<u64, _STATUS_RAW>>

pub fn fft_done(&mut self) -> FFT_DONE_W<'_>

Bit 0 - FFT done

pub fn fft_work(&mut self) -> FFT_WORK_W<'_>

Bit 1 - FFT work

impl W<u64, Reg<u64, _BLOCK_TS>>

pub fn block_ts(&mut self) -> BLOCK_TS_W<'_>

Bits 0:21 - Block transfer size

impl W<u64, Reg<u64, _CTL>>

pub fn sms(&mut self) -> SMS_W<'_>

Bit 0 - Source master select

pub fn dms(&mut self) -> DMS_W<'_>

Bit 2 - Destination master select

pub fn sinc(&mut self) -> SINC_W<'_>

Bit 4 - Source address increment

pub fn dinc(&mut self) -> DINC_W<'_>

Bit 6 - Destination address increment

pub fn src_tr_width(&mut self) -> SRC_TR_WIDTH_W<'_>

Bits 8:10 - Source transfer width

pub fn dst_tr_width(&mut self) -> DST_TR_WIDTH_W<'_>

Bits 11:13 - Destination transfer width

pub fn src_msize(&mut self) -> SRC_MSIZE_W<'_>

Bits 14:17 - Source burst transaction length

pub fn dst_msize(&mut self) -> DST_MSIZE_W<'_>

Bits 18:21 - Destination burst transaction length

pub fn nonposted_lastwrite_en(&mut self) -> NONPOSTED_LASTWRITE_EN_W<'_>

Bit 30 - Non Posted Last Write Enable (posted writes may be used till the end of the block)

pub fn arlen_en(&mut self) -> ARLEN_EN_W<'_>

Bit 38 - Source burst length enable

pub fn arlen(&mut self) -> ARLEN_W<'_>

Bits 39:46 - Source burst length

pub fn awlen_en(&mut self) -> AWLEN_EN_W<'_>

Bit 47 - Destination burst length enable

pub fn awlen(&mut self) -> AWLEN_W<'_>

Bits 48:55 - Destination burst length

pub fn src_stat_en(&mut self) -> SRC_STAT_EN_W<'_>

Bit 56 - Source status enable

pub fn dst_stat_en(&mut self) -> DST_STAT_EN_W<'_>

Bit 57 - Destination status enable

pub fn ioc_blktfr(&mut self) -> IOC_BLKTFR_W<'_>

Bit 58 - Interrupt completion of block transfer

pub fn shadowreg_or_lli_last(&mut self) -> SHADOWREG_OR_LLI_LAST_W<'_>

Bit 62 - Last shadow linked list item (indicates shadowreg/LLI content is the last one)

pub fn shadowreg_or_lli_valid(&mut self) -> SHADOWREG_OR_LLI_VALID_W<'_>

Bit 63 - last shadow linked list item valid (indicate shadowreg/LLI content is valid)

impl W<u64, Reg<u64, _CFG>>

pub fn src_multblk_type(&mut self) -> SRC_MULTBLK_TYPE_W<'_>

Bits 0:1 - Source multi-block transfer type

pub fn dst_multblk_type(&mut self) -> DST_MULTBLK_TYPE_W<'_>

Bits 2:3 - Destination multi-block transfer type

pub fn tt_fc(&mut self) -> TT_FC_W<'_>

Bits 32:34 - Transfer type and flow control

pub fn hs_sel_src(&mut self) -> HS_SEL_SRC_W<'_>

Bit 35 - Source software or hardware handshaking select

pub fn hs_sel_dst(&mut self) -> HS_SEL_DST_W<'_>

Bit 36 - Destination software or hardware handshaking select

pub fn src_hwhs_pol(&mut self) -> SRC_HWHS_POL_W<'_>

Bit 37 - Source hardware handshaking interface polarity

pub fn dst_hwhs_pol(&mut self) -> DST_HWHS_POL_W<'_>

Bit 38 - Destination hardware handshaking interface polarity

pub fn src_per(&mut self) -> SRC_PER_W<'_>

Bits 39:42 - Assign a hardware handshaking interface to source of channel

pub fn dst_per(&mut self) -> DST_PER_W<'_>

Bits 44:47 - Assign a hardware handshaking interface to destination of channel

pub fn ch_prior(&mut self) -> CH_PRIOR_W<'_>

Bits 49:51 - Channel priority (7 is highest, 0 is lowest)

pub fn lock_ch(&mut self) -> LOCK_CH_W<'_>

Bit 52 - Channel lock bit

pub fn lock_ch_l(&mut self) -> LOCK_CH_L_W<'_>

Bits 53:54 - Channel lock level

pub fn src_osr_lmt(&mut self) -> SRC_OSR_LMT_W<'_>

Bits 55:58 - Source outstanding request limit

pub fn dst_osr_lmt(&mut self) -> DST_OSR_LMT_W<'_>

Bits 59:62 - Destination outstanding request limit

impl W<u64, Reg<u64, _LLP>>

pub fn lms(&mut self) -> LMS_W<'_>

Bit 0 - LLI master select

pub fn loc(&mut self) -> LOC_W<'_>

Bits 6:63 - Starting address memeory of LLI block

impl W<u64, Reg<u64, _STATUS>>

pub fn cmpltd_blk_size(&mut self) -> CMPLTD_BLK_SIZE_W<'_>

Bits 0:21 - Completed block transfer size

impl W<u64, Reg<u64, _SWHSSRC>>

pub fn req(&mut self) -> REQ_W<'_>

Bit 0 - Software handshake request for channel source

pub fn req_we(&mut self) -> REQ_WE_W<'_>

Bit 1 - Write enable bit for software handshake request

pub fn sglreq(&mut self) -> SGLREQ_W<'_>

Bit 2 - Software handshake single request for channel source

pub fn sglreq_we(&mut self) -> SGLREQ_WE_W<'_>

Bit 3 - Write enable bit for software handshake

pub fn lst(&mut self) -> LST_W<'_>

Bit 4 - Software handshake last request for channel source

pub fn lst_we(&mut self) -> LST_WE_W<'_>

Bit 5 - Write enable bit for software handshake last request

impl W<u64, Reg<u64, _SWHSDST>>

pub fn req(&mut self) -> REQ_W<'_>

Bit 0 - Software handshake request for channel destination

pub fn req_we(&mut self) -> REQ_WE_W<'_>

Bit 1 - Write enable bit for software handshake request

pub fn sglreq(&mut self) -> SGLREQ_W<'_>

Bit 2 - Software handshake single request for channel destination

pub fn sglreq_we(&mut self) -> SGLREQ_WE_W<'_>

Bit 3 - Write enable bit for software handshake

pub fn lst(&mut self) -> LST_W<'_>

Bit 4 - Software handshake last request for channel destination

pub fn lst_we(&mut self) -> LST_WE_W<'_>

Bit 5 - Write enable bit for software handshake last request

impl W<u64, Reg<u64, _BLK_TFR>>

pub fn resumereq(&mut self) -> RESUMEREQ_W<'_>

Bit 0 - Block transfer resume request

impl W<u64, Reg<u64, _INTSTATUS_EN>>

pub fn block_tfr_done(&mut self) -> BLOCK_TFR_DONE_W<'_>

Bit 0 - Block transfer done

pub fn tfr_done(&mut self) -> TFR_DONE_W<'_>

Bit 1 - Transfer done

pub fn src_transcomp(&mut self) -> SRC_TRANSCOMP_W<'_>

Bit 3 - Source transaction complete

pub fn dst_transcomp(&mut self) -> DST_TRANSCOMP_W<'_>

Bit 4 - Destination transaction complete

pub fn src_dec_err(&mut self) -> SRC_DEC_ERR_W<'_>

Bit 5 - Source Decode Error

pub fn dst_dec_err(&mut self) -> DST_DEC_ERR_W<'_>

Bit 6 - Destination Decode Error

pub fn src_slv_err(&mut self) -> SRC_SLV_ERR_W<'_>

Bit 7 - Source Slave Error

pub fn dst_slv_err(&mut self) -> DST_SLV_ERR_W<'_>

Bit 8 - Destination Slave Error

pub fn lli_rd_dec_err(&mut self) -> LLI_RD_DEC_ERR_W<'_>

Bit 9 - LLI Read Decode Error Status Enable

pub fn lli_wr_dec_err(&mut self) -> LLI_WR_DEC_ERR_W<'_>

Bit 10 - LLI WRITE Decode Error

pub fn lli_rd_slv_err(&mut self) -> LLI_RD_SLV_ERR_W<'_>

Bit 11 - LLI Read Slave Error

pub fn lli_wr_slv_err(&mut self) -> LLI_WR_SLV_ERR_W<'_>

Bit 12 - LLI WRITE Slave Error

impl W<u64, Reg<u64, _INTSTATUS>>

pub fn block_tfr_done(&mut self) -> BLOCK_TFR_DONE_W<'_>

Bit 0 - Block transfer done

pub fn tfr_done(&mut self) -> TFR_DONE_W<'_>

Bit 1 - Transfer done

pub fn src_transcomp(&mut self) -> SRC_TRANSCOMP_W<'_>

Bit 3 - Source transaction complete

pub fn dst_transcomp(&mut self) -> DST_TRANSCOMP_W<'_>

Bit 4 - Destination transaction complete

pub fn src_dec_err(&mut self) -> SRC_DEC_ERR_W<'_>

Bit 5 - Source Decode Error

pub fn dst_dec_err(&mut self) -> DST_DEC_ERR_W<'_>

Bit 6 - Destination Decode Error

pub fn src_slv_err(&mut self) -> SRC_SLV_ERR_W<'_>

Bit 7 - Source Slave Error

pub fn dst_slv_err(&mut self) -> DST_SLV_ERR_W<'_>

Bit 8 - Destination Slave Error

pub fn lli_rd_dec_err(&mut self) -> LLI_RD_DEC_ERR_W<'_>

Bit 9 - LLI Read Decode Error Status Enable

pub fn lli_wr_dec_err(&mut self) -> LLI_WR_DEC_ERR_W<'_>

Bit 10 - LLI WRITE Decode Error

pub fn lli_rd_slv_err(&mut self) -> LLI_RD_SLV_ERR_W<'_>

Bit 11 - LLI Read Slave Error

pub fn lli_wr_slv_err(&mut self) -> LLI_WR_SLV_ERR_W<'_>

Bit 12 - LLI WRITE Slave Error

impl W<u64, Reg<u64, _INTSIGNAL_EN>>

pub fn block_tfr_done(&mut self) -> BLOCK_TFR_DONE_W<'_>

Bit 0 - Block transfer done

pub fn tfr_done(&mut self) -> TFR_DONE_W<'_>

Bit 1 - Transfer done

pub fn src_transcomp(&mut self) -> SRC_TRANSCOMP_W<'_>

Bit 3 - Source transaction complete

pub fn dst_transcomp(&mut self) -> DST_TRANSCOMP_W<'_>

Bit 4 - Destination transaction complete

pub fn src_dec_err(&mut self) -> SRC_DEC_ERR_W<'_>

Bit 5 - Source Decode Error

pub fn dst_dec_err(&mut self) -> DST_DEC_ERR_W<'_>

Bit 6 - Destination Decode Error

pub fn src_slv_err(&mut self) -> SRC_SLV_ERR_W<'_>

Bit 7 - Source Slave Error

pub fn dst_slv_err(&mut self) -> DST_SLV_ERR_W<'_>

Bit 8 - Destination Slave Error

pub fn lli_rd_dec_err(&mut self) -> LLI_RD_DEC_ERR_W<'_>

Bit 9 - LLI Read Decode Error Status Enable

pub fn lli_wr_dec_err(&mut self) -> LLI_WR_DEC_ERR_W<'_>

Bit 10 - LLI WRITE Decode Error

pub fn lli_rd_slv_err(&mut self) -> LLI_RD_SLV_ERR_W<'_>

Bit 11 - LLI Read Slave Error

pub fn lli_wr_slv_err(&mut self) -> LLI_WR_SLV_ERR_W<'_>

Bit 12 - LLI WRITE Slave Error

impl W<u64, Reg<u64, _INTCLEAR>>

pub fn block_tfr_done(&mut self) -> BLOCK_TFR_DONE_W<'_>

Bit 0 - Block transfer done

pub fn tfr_done(&mut self) -> TFR_DONE_W<'_>

Bit 1 - Transfer done

pub fn src_transcomp(&mut self) -> SRC_TRANSCOMP_W<'_>

Bit 3 - Source transaction complete

pub fn dst_transcomp(&mut self) -> DST_TRANSCOMP_W<'_>

Bit 4 - Destination transaction complete

pub fn src_dec_err(&mut self) -> SRC_DEC_ERR_W<'_>

Bit 5 - Source Decode Error

pub fn dst_dec_err(&mut self) -> DST_DEC_ERR_W<'_>

Bit 6 - Destination Decode Error

pub fn src_slv_err(&mut self) -> SRC_SLV_ERR_W<'_>

Bit 7 - Source Slave Error

pub fn dst_slv_err(&mut self) -> DST_SLV_ERR_W<'_>

Bit 8 - Destination Slave Error

pub fn lli_rd_dec_err(&mut self) -> LLI_RD_DEC_ERR_W<'_>

Bit 9 - LLI Read Decode Error Status Enable

pub fn lli_wr_dec_err(&mut self) -> LLI_WR_DEC_ERR_W<'_>

Bit 10 - LLI WRITE Decode Error

pub fn lli_rd_slv_err(&mut self) -> LLI_RD_SLV_ERR_W<'_>

Bit 11 - LLI Read Slave Error

pub fn lli_wr_slv_err(&mut self) -> LLI_WR_SLV_ERR_W<'_>

Bit 12 - LLI WRITE Slave Error

impl W<u64, Reg<u64, _CFG>>

pub fn dmac_en(&mut self) -> DMAC_EN_W<'_>

Bit 0 - Enable DMAC

pub fn int_en(&mut self) -> INT_EN_W<'_>

Bit 1 - Globally enable interrupt generation

impl W<u64, Reg<u64, _CHEN>>

pub fn ch1_en(&mut self) -> CH1_EN_W<'_>

Bit 0 - Enable channel 1

pub fn ch2_en(&mut self) -> CH2_EN_W<'_>

Bit 1 - Enable channel 2

pub fn ch3_en(&mut self) -> CH3_EN_W<'_>

Bit 2 - Enable channel 3

pub fn ch4_en(&mut self) -> CH4_EN_W<'_>

Bit 3 - Enable channel 4

pub fn ch5_en(&mut self) -> CH5_EN_W<'_>

Bit 4 - Enable channel 5

pub fn ch6_en(&mut self) -> CH6_EN_W<'_>

Bit 5 - Enable channel 6

pub fn ch1_en_we(&mut self) -> CH1_EN_WE_W<'_>

Bit 8 - Write enable channel 1

pub fn ch2_en_we(&mut self) -> CH2_EN_WE_W<'_>

Bit 9 - Write enable channel 2

pub fn ch3_en_we(&mut self) -> CH3_EN_WE_W<'_>

Bit 10 - Write enable channel 3

pub fn ch4_en_we(&mut self) -> CH4_EN_WE_W<'_>

Bit 11 - Write enable channel 4

pub fn ch5_en_we(&mut self) -> CH5_EN_WE_W<'_>

Bit 12 - Write enable channel 5

pub fn ch6_en_we(&mut self) -> CH6_EN_WE_W<'_>

Bit 13 - Write enable channel 6

pub fn ch1_susp(&mut self) -> CH1_SUSP_W<'_>

Bit 16 - Suspend request channel 1

pub fn ch2_susp(&mut self) -> CH2_SUSP_W<'_>

Bit 17 - Suspend request channel 2

pub fn ch3_susp(&mut self) -> CH3_SUSP_W<'_>

Bit 18 - Suspend request channel 3

pub fn ch4_susp(&mut self) -> CH4_SUSP_W<'_>

Bit 19 - Suspend request channel 4

pub fn ch5_susp(&mut self) -> CH5_SUSP_W<'_>

Bit 20 - Suspend request channel 5

pub fn ch6_susp(&mut self) -> CH6_SUSP_W<'_>

Bit 21 - Suspend request channel 6

pub fn ch1_susp_we(&mut self) -> CH1_SUSP_WE_W<'_>

Bit 24 - Enable write to ch1_susp bit

pub fn ch2_susp_we(&mut self) -> CH2_SUSP_WE_W<'_>

Bit 25 - Enable write to ch2_susp bit

pub fn ch3_susp_we(&mut self) -> CH3_SUSP_WE_W<'_>

Bit 26 - Enable write to ch3_susp bit

pub fn ch4_susp_we(&mut self) -> CH4_SUSP_WE_W<'_>

Bit 27 - Enable write to ch4_susp bit

pub fn ch5_susp_we(&mut self) -> CH5_SUSP_WE_W<'_>

Bit 28 - Enable write to ch5_susp bit

pub fn ch6_susp_we(&mut self) -> CH6_SUSP_WE_W<'_>

Bit 29 - Enable write to ch6_susp bit

pub fn ch1_abort(&mut self) -> CH1_ABORT_W<'_>

Bit 32 - Abort request channel 1

pub fn ch2_abort(&mut self) -> CH2_ABORT_W<'_>

Bit 33 - Abort request channel 2

pub fn ch3_abort(&mut self) -> CH3_ABORT_W<'_>

Bit 34 - Abort request channel 3

pub fn ch4_abort(&mut self) -> CH4_ABORT_W<'_>

Bit 35 - Abort request channel 4

pub fn ch5_abort(&mut self) -> CH5_ABORT_W<'_>

Bit 36 - Abort request channel 5

pub fn ch6_abort(&mut self) -> CH6_ABORT_W<'_>

Bit 37 - Abort request channel 6

pub fn ch1_abort_we(&mut self) -> CH1_ABORT_WE_W<'_>

Bit 40 - Enable write to ch1_abort bit

pub fn ch2_abort_we(&mut self) -> CH2_ABORT_WE_W<'_>

Bit 41 - Enable write to ch2_abort bit

pub fn ch3_abort_we(&mut self) -> CH3_ABORT_WE_W<'_>

Bit 42 - Enable write to ch3_abort bit

pub fn ch4_abort_we(&mut self) -> CH4_ABORT_WE_W<'_>

Bit 43 - Enable write to ch4_abort bit

pub fn ch5_abort_we(&mut self) -> CH5_ABORT_WE_W<'_>

Bit 44 - Enable write to ch5_abort bit

pub fn ch6_abort_we(&mut self) -> CH6_ABORT_WE_W<'_>

Bit 45 - Enable write to ch6_abort bit

impl W<u64, Reg<u64, _INTSTATUS>>

pub fn ch1_intstat(&mut self) -> CH1_INTSTAT_W<'_>

Bit 0 - Channel 1 interrupt bit

pub fn ch2_intstat(&mut self) -> CH2_INTSTAT_W<'_>

Bit 1 - Channel 2 interrupt bit

pub fn ch3_intstat(&mut self) -> CH3_INTSTAT_W<'_>

Bit 2 - Channel 3 interrupt bit

pub fn ch4_intstat(&mut self) -> CH4_INTSTAT_W<'_>

Bit 3 - Channel 4 interrupt bit

pub fn ch5_intstat(&mut self) -> CH5_INTSTAT_W<'_>

Bit 4 - Channel 5 interrupt bit

pub fn ch6_intstat(&mut self) -> CH6_INTSTAT_W<'_>

Bit 5 - Channel 6 interrupt bit

pub fn commonreg_intstat(&mut self) -> COMMONREG_INTSTAT_W<'_>

Bit 16 - Common register status bit

impl W<u64, Reg<u64, _COM_INTCLEAR>>

pub fn slvif_dec_err(&mut self) -> SLVIF_DEC_ERR_W<'_>

Bit 0 - Clear slvif_dec_err interrupt in com_intstatus

pub fn slvif_wr2ro_err(&mut self) -> SLVIF_WR2RO_ERR_W<'_>

Bit 1 - Clear slvif_wr2ro_err interrupt in com_intstatus

pub fn slvif_rd2wo_err(&mut self) -> SLVIF_RD2WO_ERR_W<'_>

Bit 2 - Clear slvif_rd2wo_err interrupt in com_intstatus

pub fn slvif_wronhold_err(&mut self) -> SLVIF_WRONHOLD_ERR_W<'_>

Bit 3 - Clear slvif_wronhold_err interrupt in com_intstatus

pub fn slvif_undefinedreg_dec_err(&mut self) -> SLVIF_UNDEFINEDREG_DEC_ERR_W<'_>

Bit 8 - Clear slvif_undefinedreg_dec_err in com_intstatus

impl W<u64, Reg<u64, _COM_INTSTATUS_EN>>

pub fn slvif_dec_err(&mut self) -> SLVIF_DEC_ERR_W<'_>

Bit 0 - Slave Interface Common Register Decode Error

pub fn slvif_wr2ro_err(&mut self) -> SLVIF_WR2RO_ERR_W<'_>

Bit 1 - Slave Interface Common Register Write to Read only Error

pub fn slvif_rd2wo_err(&mut self) -> SLVIF_RD2WO_ERR_W<'_>

Bit 2 - Slave Interface Common Register Read to Write-only Error

pub fn slvif_wronhold_err(&mut self) -> SLVIF_WRONHOLD_ERR_W<'_>

Bit 3 - Slave Interface Common Register Write On Hold Error

pub fn slvif_undefinedreg_dec_err(&mut self) -> SLVIF_UNDEFINEDREG_DEC_ERR_W<'_>

Bit 8 - Slave Interface Undefined Register Decode Error

impl W<u64, Reg<u64, _COM_INTSIGNAL_EN>>

pub fn slvif_dec_err(&mut self) -> SLVIF_DEC_ERR_W<'_>

Bit 0 - Slave Interface Common Register Decode Error

pub fn slvif_wr2ro_err(&mut self) -> SLVIF_WR2RO_ERR_W<'_>

Bit 1 - Slave Interface Common Register Write to Read only Error

pub fn slvif_rd2wo_err(&mut self) -> SLVIF_RD2WO_ERR_W<'_>

Bit 2 - Slave Interface Common Register Read to Write-only Error

pub fn slvif_wronhold_err(&mut self) -> SLVIF_WRONHOLD_ERR_W<'_>

Bit 3 - Slave Interface Common Register Write On Hold Error

pub fn slvif_undefinedreg_dec_err(&mut self) -> SLVIF_UNDEFINEDREG_DEC_ERR_W<'_>

Bit 8 - Slave Interface Undefined Register Decode Error

impl W<u64, Reg<u64, _COM_INTSTATUS>>

pub fn slvif_dec_err(&mut self) -> SLVIF_DEC_ERR_W<'_>

Bit 0 - Slave Interface Common Register Decode Error

pub fn slvif_wr2ro_err(&mut self) -> SLVIF_WR2RO_ERR_W<'_>

Bit 1 - Slave Interface Common Register Write to Read only Error

pub fn slvif_rd2wo_err(&mut self) -> SLVIF_RD2WO_ERR_W<'_>

Bit 2 - Slave Interface Common Register Read to Write-only Error

pub fn slvif_wronhold_err(&mut self) -> SLVIF_WRONHOLD_ERR_W<'_>

Bit 3 - Slave Interface Common Register Write On Hold Error

pub fn slvif_undefinedreg_dec_err(&mut self) -> SLVIF_UNDEFINEDREG_DEC_ERR_W<'_>

Bit 8 - Slave Interface Undefined Register Decode Error

impl W<u64, Reg<u64, _RESET>>

pub fn rst(&mut self) -> RST_W<'_>

Bit 0 - DMAC reset request bit

impl W<u32, Reg<u32, _DATA_OUTPUT>>

pub fn pin0(&mut self) -> PIN0_W<'_>

Bit 0

pub fn pin1(&mut self) -> PIN1_W<'_>

Bit 1

pub fn pin2(&mut self) -> PIN2_W<'_>

Bit 2

pub fn pin3(&mut self) -> PIN3_W<'_>

Bit 3

pub fn pin4(&mut self) -> PIN4_W<'_>

Bit 4

pub fn pin5(&mut self) -> PIN5_W<'_>

Bit 5

pub fn pin6(&mut self) -> PIN6_W<'_>

Bit 6

pub fn pin7(&mut self) -> PIN7_W<'_>

Bit 7

impl W<u32, Reg<u32, _DIRECTION>>

pub fn pin0(&mut self) -> PIN0_W<'_>

Bit 0

pub fn pin1(&mut self) -> PIN1_W<'_>

Bit 1

pub fn pin2(&mut self) -> PIN2_W<'_>

Bit 2

pub fn pin3(&mut self) -> PIN3_W<'_>

Bit 3

pub fn pin4(&mut self) -> PIN4_W<'_>

Bit 4

pub fn pin5(&mut self) -> PIN5_W<'_>

Bit 5

pub fn pin6(&mut self) -> PIN6_W<'_>

Bit 6

pub fn pin7(&mut self) -> PIN7_W<'_>

Bit 7

impl W<u32, Reg<u32, _DATA_INPUT>>

pub fn pin0(&mut self) -> PIN0_W<'_>

Bit 0

pub fn pin1(&mut self) -> PIN1_W<'_>

Bit 1

pub fn pin2(&mut self) -> PIN2_W<'_>

Bit 2

pub fn pin3(&mut self) -> PIN3_W<'_>

Bit 3

pub fn pin4(&mut self) -> PIN4_W<'_>

Bit 4

pub fn pin5(&mut self) -> PIN5_W<'_>

Bit 5

pub fn pin6(&mut self) -> PIN6_W<'_>

Bit 6

pub fn pin7(&mut self) -> PIN7_W<'_>

Bit 7

impl W<u32, Reg<u32, _CTRLR0>>

pub fn work_mode(&mut self) -> WORK_MODE_W<'_>

Bits 6:7 - WORK_MODE

pub fn tmod(&mut self) -> TMOD_W<'_>

Bits 8:9 - TRANSFER_MODE

pub fn frame_format(&mut self) -> FRAME_FORMAT_W<'_>

Bits 21:22 - FRAME_FORMAT

pub fn data_length(&mut self) -> DATA_LENGTH_W<'_>

Bits 16:20 - DATA_BIT_LENGTH

impl W<u32, Reg<u32, _SPI_CTRLR0>>

pub fn aitm(&mut self) -> AITM_W<'_>

Bits 0:1 - instruction_address_trans_mode

pub fn addr_length(&mut self) -> ADDR_LENGTH_W<'_>

Bits 2:5 - ADDR_LENGTH

pub fn inst_length(&mut self) -> INST_LENGTH_W<'_>

Bits 8:9 - INSTRUCTION_LENGTH

pub fn wait_cycles(&mut self) -> WAIT_CYCLES_W<'_>

Bits 11:15 - WAIT_CYCLES

impl W<u32, Reg<u32, _CTRLR0>>

pub fn data_length(&mut self) -> DATA_LENGTH_W<'_>

Bits 0:4 - DATA_BIT_LENGTH

pub fn work_mode(&mut self) -> WORK_MODE_W<'_>

Bits 8:9 - WORK_MODE

pub fn tmod(&mut self) -> TMOD_W<'_>

Bits 10:11 - TRANSFER_MODE

pub fn frame_format(&mut self) -> FRAME_FORMAT_W<'_>

Bits 22:23 - FRAME_FORMAT

impl W<u32, Reg<u32, _SPI_CTRLR0>>

pub fn aitm(&mut self) -> AITM_W<'_>

Bits 0:1 - instruction_address_trans_mode

pub fn addr_length(&mut self) -> ADDR_LENGTH_W<'_>

Bits 2:5 - ADDR_LENGTH

pub fn inst_length(&mut self) -> INST_LENGTH_W<'_>

Bits 8:9 - INSTRUCTION_LENGTH

pub fn wait_cycles(&mut self) -> WAIT_CYCLES_W<'_>

Bits 11:15 - WAIT_CYCLES

impl W<u32, Reg<u32, _RER>>

pub fn rxchenx(&mut self) -> RXCHENX_W<'_>

Bit 0 - Receive channel enable/disable

impl W<u32, Reg<u32, _TER>>

pub fn txchenx(&mut self) -> TXCHENX_W<'_>

Bit 0 - Transmit channel enable/disable

impl W<u32, Reg<u32, _RCR>>

pub fn wlen(&mut self) -> WLEN_W<'_>

Bits 0:2 - Desired data resolution of receiver

impl W<u32, Reg<u32, _TCR>>

pub fn wlen(&mut self) -> WLEN_W<'_>

Bits 0:2 - Desired data resolution of transmitter

impl W<u32, Reg<u32, _IMR>>

pub fn rxdam(&mut self) -> RXDAM_W<'_>

Bit 0 - Mask RX FIFO data avaliable interrupt

pub fn rxfom(&mut self) -> RXFOM_W<'_>

Bit 1 - Mask RX FIFO overrun interrupt

pub fn txfem(&mut self) -> TXFEM_W<'_>

Bit 4 - Mask TX FIFO empty interrupt

pub fn txfom(&mut self) -> TXFOM_W<'_>

Bit 5 - Mask TX FIFO overrun interrupt

impl W<u32, Reg<u32, _RFCR>>

pub fn rxchdt(&mut self) -> RXCHDT_W<'_>

Bits 0:3 - Trigger level in the RX FIFO at which the receiver data available interrupt generate

impl W<u32, Reg<u32, _TFCR>>

pub fn txchet(&mut self) -> TXCHET_W<'_>

Bits 0:3 - Trigger level in the TX FIFO at which the transmitter data available interrupt generate

impl W<u32, Reg<u32, _RFF>>

pub fn rxchfr(&mut self) -> RXCHFR_W<'_>

Bit 0 - Receiver channel FIFO reset

impl W<u32, Reg<u32, _TFF>>

pub fn rtxchfr(&mut self) -> RTXCHFR_W<'_>

Bit 0 - Transmit channel FIFO reset

impl W<u32, Reg<u32, _IER>>

pub fn ien(&mut self) -> IEN_W<'_>

Bit 0 - I2S Enable

impl W<u32, Reg<u32, _IRER>>

pub fn rxen(&mut self) -> RXEN_W<'_>

Bit 0 - Receiver block enable

impl W<u32, Reg<u32, _ITER>>

pub fn txen(&mut self) -> TXEN_W<'_>

Bit 0 - Transmitter block enable

impl W<u32, Reg<u32, _CER>>

pub fn clken(&mut self) -> CLKEN_W<'_>

Bit 0 - Transmitter block enable

impl W<u32, Reg<u32, _CCR>>

pub fn clk_gate(&mut self) -> CLK_GATE_W<'_>

Bits 0:2 - Gating of sclk

pub fn clk_word_size(&mut self) -> CLK_WORD_SIZE_W<'_>

Bits 3:4 - The number of sclk cycles for which the word select line stayd in the left aligned or right aligned mode

pub fn align_mode(&mut self) -> ALIGN_MODE_W<'_>

Bits 5:7 - Alignment mode setting

pub fn dma_tx_en(&mut self) -> DMA_TX_EN_W<'_>

Bit 8 - DMA transmit enable control

pub fn dma_rx_en(&mut self) -> DMA_RX_EN_W<'_>

Bit 9 - DMA receive enable control

pub fn dma_divide_16(&mut self) -> DMA_DIVIDE_16_W<'_>

Bit 10 - Split 32bit data to two 16 bit data and filled in left and right channel. Used with dma_tx_en or dma_rx_en

pub fn sign_expand_en(&mut self) -> SIGN_EXPAND_EN_W<'_>

Bit 11 - SIGN_EXPAND_EN

impl W<u32, Reg<u32, _RXFFR>>

pub fn rxffr(&mut self) -> RXFFR_W<'_>

Bit 0 - Receiver FIFO reset

impl W<u32, Reg<u32, _TXFFR>>

pub fn rxffr(&mut self) -> RXFFR_W<'_>

Bit 0 - Transmitter FIFO reset

impl W<u32, Reg<u32, _CH_CFG>>

pub fn sound_ch_en(&mut self) -> SOUND_CH_EN_W<'_>

Bits 0:7 - BF unit sound channel enable control bits

pub fn target_dir(&mut self) -> TARGET_DIR_W<'_>

Bits 8:11 - Target direction select for valid voice output

pub fn audio_gain(&mut self) -> AUDIO_GAIN_W<'_>

Bits 12:22 - Audio sample gain factor

pub fn data_src_mode(&mut self) -> DATA_SRC_MODE_W<'_>

Bit 24 - Audio data source configure parameter

pub fn we_sound_ch_en(&mut self) -> WE_SOUND_CH_EN_W<'_>

Bit 28 - Write enable for sound_ch_en parameter

pub fn we_target_dir(&mut self) -> WE_TARGET_DIR_W<'_>

Bit 29 - Write enable for target_dir parameter

pub fn we_audio_gain(&mut self) -> WE_AUDIO_GAIN_W<'_>

Bit 30 - Write enable for audio_gain parameter

pub fn we_data_src_mode(&mut self) -> WE_DATA_SRC_MODE_W<'_>

Bit 31 - Write enable for data_out_mode parameter

impl W<u32, Reg<u32, _CTL>>

pub fn dir_search_en(&mut self) -> DIR_SEARCH_EN_W<'_>

Bit 0 - Sound direction searching enable bit

pub fn search_path_reset(&mut self) -> SEARCH_PATH_RESET_W<'_>

Bit 1 - Reset all control logic on direction search processing path

pub fn stream_gen_en(&mut self) -> STREAM_GEN_EN_W<'_>

Bit 4 - Valid voice sample stream generation enable bit

pub fn voice_gen_path_reset(&mut self) -> VOICE_GEN_PATH_RESET_W<'_>

Bit 5 - Reset all control logic on voice stream generating path

pub fn update_voice_dir(&mut self) -> UPDATE_VOICE_DIR_W<'_>

Bit 6 - Switch to a new voice source direction

pub fn we_dir_search_en(&mut self) -> WE_DIR_SEARCH_EN_W<'_>

Bit 8 - Write enable for we_dir_search_en parameter

pub fn we_search_path_rst(&mut self) -> WE_SEARCH_PATH_RST_W<'_>

Bit 9 - Write enable for we_search_path_rst parameter

pub fn we_stream_gen(&mut self) -> WE_STREAM_GEN_W<'_>

Bit 10 - Write enable for we_stream_gen parameter

pub fn we_voice_gen_path_rst(&mut self) -> WE_VOICE_GEN_PATH_RST_W<'_>

Bit 11 - Write enable for we_voice_gen_path_rst parameter

pub fn we_update_voice_dir(&mut self) -> WE_UPDATE_VOICE_DIR_W<'_>

Bit 12 - Write enable for we_update_voice_dir parameter

impl W<u32, Reg<u32, _DIR_BIDX>>

pub fn rd_idx0(&mut self) -> RD_IDX0_W<'_>

Bits 0:5 - rd_idx0

pub fn rd_idx1(&mut self) -> RD_IDX1_W<'_>

Bits 8:13 - rd_idx1

pub fn rd_idx2(&mut self) -> RD_IDX2_W<'_>

Bits 16:21 - rd_idx2

pub fn rd_idx3(&mut self) -> RD_IDX3_W<'_>

Bits 24:29 - rd_idx3

impl W<u32, Reg<u32, _PRE_FIR0_COEF>>

pub fn tap0(&mut self) -> TAP0_W<'_>

Bits 0:15 - Tap 0

pub fn tap1(&mut self) -> TAP1_W<'_>

Bits 16:31 - Tap 1

impl W<u32, Reg<u32, _POST_FIR0_COEF>>

pub fn tap0(&mut self) -> TAP0_W<'_>

Bits 0:15 - Tap 0

pub fn tap1(&mut self) -> TAP1_W<'_>

Bits 16:31 - Tap 1

impl W<u32, Reg<u32, _PRE_FIR1_COEF>>

pub fn tap0(&mut self) -> TAP0_W<'_>

Bits 0:15 - Tap 0

pub fn tap1(&mut self) -> TAP1_W<'_>

Bits 16:31 - Tap 1

impl W<u32, Reg<u32, _POST_FIR1_COEF>>

pub fn tap0(&mut self) -> TAP0_W<'_>

Bits 0:15 - Tap 0

pub fn tap1(&mut self) -> TAP1_W<'_>

Bits 16:31 - Tap 1

impl W<u32, Reg<u32, _DWSZ_CFG>>

pub fn dir_dwn_siz_rate(&mut self) -> DIR_DWN_SIZ_RATE_W<'_>

Bits 0:3 - Down-sizing ratio used for direction searching

pub fn voc_dwn_siz_rate(&mut self) -> VOC_DWN_SIZ_RATE_W<'_>

Bits 4:7 - Down-sizing ratio used for voice stream generation

pub fn smpl_shift_bits(&mut self) -> SMPL_SHIFT_BITS_W<'_>

Bits 8:12 - Sample precision reduction when the source sound sample precision is 20/24/32 bits

impl W<u32, Reg<u32, _INT_STAT>>

pub fn dir_search_data_rdy(&mut self) -> DIR_SEARCH_DATA_RDY_W<'_>

Bit 0 - Sound direction searching data ready interrupt event

pub fn voc_buf_data_rdy(&mut self) -> VOC_BUF_DATA_RDY_W<'_>

Bit 1 - Voice output stream buffer data ready interrupt event

impl W<u32, Reg<u32, _INT_MASK>>

pub fn dir_search_data_rdy(&mut self) -> DIR_SEARCH_DATA_RDY_W<'_>

Bit 0 - Sound direction searching data ready interrupt event

pub fn voc_buf_data_rdy(&mut self) -> VOC_BUF_DATA_RDY_W<'_>

Bit 1 - Voice output stream buffer data ready interrupt event

impl W<u32, Reg<u32, _SAT_COUNTER>>

pub fn counter(&mut self) -> COUNTER_W<'_>

Bits 0:15 - Counter

pub fn total(&mut self) -> TOTAL_W<'_>

Bits 16:31 - Total

impl W<u32, Reg<u32, _SAT_LIMITS>>

pub fn upper(&mut self) -> UPPER_W<'_>

Bits 0:15 - Upper limit

pub fn bottom(&mut self) -> BOTTOM_W<'_>

Bits 16:31 - Bottom limit

impl W<u32, Reg<u32, _CON>>

pub fn master_mode(&mut self) -> MASTER_MODE_W<'_>

Bit 0 - Master Mode

pub fn speed(&mut self) -> SPEED_W<'_>

Bits 1:2 - Speed

pub fn addr_slave_width(&mut self) -> ADDR_SLAVE_WIDTH_W<'_>

Bit 3 - Slave address width

pub fn restart_en(&mut self) -> RESTART_EN_W<'_>

Bit 5 - Enable Restart

pub fn slave_disable(&mut self) -> SLAVE_DISABLE_W<'_>

Bit 6 - Disable Slave

pub fn stop_det(&mut self) -> STOP_DET_W<'_>

Bit 7 - STOP_DET_IFADDRESSED

pub fn tx_empty(&mut self) -> TX_EMPTY_W<'_>

Bit 8 - TX_EMPTY_CTRL

impl W<u32, Reg<u32, _TAR>>

pub fn address(&mut self) -> ADDRESS_W<'_>

Bits 0:9 - Target Address

pub fn gc(&mut self) -> GC_W<'_>

Bit 10 - GC_OR_START

pub fn special(&mut self) -> SPECIAL_W<'_>

Bit 11 - SPECIAL

pub fn addr_master_width(&mut self) -> ADDR_MASTER_WIDTH_W<'_>

Bit 12 - Master Address

impl W<u32, Reg<u32, _SAR>>

pub fn address(&mut self) -> ADDRESS_W<'_>

Bits 0:9 - Slave Address

impl W<u32, Reg<u32, _DATA_CMD>>

pub fn cmd(&mut self) -> CMD_W<'_>

Bit 8 - CMD

pub fn data(&mut self) -> DATA_W<'_>

Bits 0:7 - Data

impl W<u32, Reg<u32, _SS_SCL_HCNT>>

pub fn count(&mut self) -> COUNT_W<'_>

Bits 0:15 - COUNT

impl W<u32, Reg<u32, _SS_SCL_LCNT>>

pub fn count(&mut self) -> COUNT_W<'_>

Bits 0:15 - COUNT

impl W<u32, Reg<u32, _INTR_MASK>>

pub fn rx_under(&mut self) -> RX_UNDER_W<'_>

Bit 0 - RX_UNDER

pub fn rx_over(&mut self) -> RX_OVER_W<'_>

Bit 1 - RX_OVER

pub fn rx_full(&mut self) -> RX_FULL_W<'_>

Bit 2 - RX_FULL

pub fn tx_over(&mut self) -> TX_OVER_W<'_>

Bit 3 - TX_OVER

pub fn tx_empty(&mut self) -> TX_EMPTY_W<'_>

Bit 4 - TX_EMPTY

pub fn rd_req(&mut self) -> RD_REQ_W<'_>

Bit 5 - RD_REQ

pub fn tx_abrt(&mut self) -> TX_ABRT_W<'_>

Bit 6 - TX_ABRT

pub fn rx_done(&mut self) -> RX_DONE_W<'_>

Bit 7 - RX_DONE

pub fn activity(&mut self) -> ACTIVITY_W<'_>

Bit 8 - ACTIVITY

pub fn stop_det(&mut self) -> STOP_DET_W<'_>

Bit 9 - STOP_DET

pub fn start_det(&mut self) -> START_DET_W<'_>

Bit 10 - START_DET

pub fn gen_call(&mut self) -> GEN_CALL_W<'_>

Bit 11 - GEN_CALL

impl W<u32, Reg<u32, _RAW_INTR_STAT>>

pub fn rx_under(&mut self) -> RX_UNDER_W<'_>

Bit 0 - RX_UNDER

pub fn rx_over(&mut self) -> RX_OVER_W<'_>

Bit 1 - RX_OVER

pub fn rx_full(&mut self) -> RX_FULL_W<'_>

Bit 2 - RX_FULL

pub fn tx_over(&mut self) -> TX_OVER_W<'_>

Bit 3 - TX_OVER

pub fn tx_empty(&mut self) -> TX_EMPTY_W<'_>

Bit 4 - TX_EMPTY

pub fn rd_req(&mut self) -> RD_REQ_W<'_>

Bit 5 - RD_REQ

pub fn tx_abrt(&mut self) -> TX_ABRT_W<'_>

Bit 6 - TX_ABRT

pub fn rx_done(&mut self) -> RX_DONE_W<'_>

Bit 7 - RX_DONE

pub fn activity(&mut self) -> ACTIVITY_W<'_>

Bit 8 - ACTIVITY

pub fn stop_det(&mut self) -> STOP_DET_W<'_>

Bit 9 - STOP_DET

pub fn start_det(&mut self) -> START_DET_W<'_>

Bit 10 - START_DET

pub fn gen_call(&mut self) -> GEN_CALL_W<'_>

Bit 11 - GEN_CALL

impl W<u32, Reg<u32, _RX_TL>>

pub fn value(&mut self) -> VALUE_W<'_>

Bits 0:2 - VALUE

impl W<u32, Reg<u32, _TX_TL>>

pub fn value(&mut self) -> VALUE_W<'_>

Bits 0:2 - VALUE

impl W<u32, Reg<u32, _ENABLE>>

pub fn enable(&mut self) -> ENABLE_W<'_>

Bit 0 - ENABLE

pub fn abort(&mut self) -> ABORT_W<'_>

Bit 1 - ABORT

pub fn tx_cmd_block(&mut self) -> TX_CMD_BLOCK_W<'_>

Bit 2 - TX_CMD_BLOCK

impl W<u32, Reg<u32, _TXFLR>>

pub fn value(&mut self) -> VALUE_W<'_>

Bits 0:2 - VALUE

impl W<u32, Reg<u32, _RXFLR>>

pub fn value(&mut self) -> VALUE_W<'_>

Bits 0:2 - VALUE

impl W<u32, Reg<u32, _SDA_HOLD>>

pub fn tx(&mut self) -> TX_W<'_>

Bits 0:15 - TX

pub fn rx(&mut self) -> RX_W<'_>

Bits 16:23 - RX

impl W<u32, Reg<u32, _TX_ABRT_SOURCE>>

pub fn addr7_noack(&mut self) -> ADDR7_NOACK_W<'_>

Bit 0 - 7B_ADDR_NOACK

pub fn addr1_10_noack(&mut self) -> ADDR1_10_NOACK_W<'_>

Bit 1 - 10B_ADDR1_NOACK

pub fn addr2_10_noack(&mut self) -> ADDR2_10_NOACK_W<'_>

Bit 2 - 10B_ADDR2_NOACK

pub fn txdata_noack(&mut self) -> TXDATA_NOACK_W<'_>

Bit 3 - TXDATA_NOACK

pub fn gcall_noack(&mut self) -> GCALL_NOACK_W<'_>

Bit 4 - GCALL_NOACK

pub fn gcall_read(&mut self) -> GCALL_READ_W<'_>

Bit 5 - GCALL_READ

pub fn hs_ackdet(&mut self) -> HS_ACKDET_W<'_>

Bit 6 - HS_ACKDET

pub fn sbyte_ackdet(&mut self) -> SBYTE_ACKDET_W<'_>

Bit 7 - SBYTE_ACKDET

pub fn hs_norstrt(&mut self) -> HS_NORSTRT_W<'_>

Bit 8 - HS_NORSTRT

pub fn sbyte_norstrt(&mut self) -> SBYTE_NORSTRT_W<'_>

Bit 9 - SBYTE_NORSTRT

pub fn rd_10_norstrt(&mut self) -> RD_10_NORSTRT_W<'_>

Bit 10 - 10B_RD_NORSTRT

pub fn master_dis(&mut self) -> MASTER_DIS_W<'_>

Bit 11 - MASTER_DIS

pub fn mst_arblost(&mut self) -> MST_ARBLOST_W<'_>

Bit 12 - MST_ARBLOST

pub fn slvflush_txfifo(&mut self) -> SLVFLUSH_TXFIFO_W<'_>

Bit 13 - SLVFLUSH_TXFIFO

pub fn slv_arblost(&mut self) -> SLV_ARBLOST_W<'_>

Bit 14 - SLV_ARBLOST

pub fn slvrd_intx(&mut self) -> SLVRD_INTX_W<'_>

Bit 15 - SLVRD_INTX

pub fn user_abrt(&mut self) -> USER_ABRT_W<'_>

Bit 16 - USER_ABRT

impl W<u32, Reg<u32, _DMA_CR>>

pub fn rdmae(&mut self) -> RDMAE_W<'_>

Bit 0 - RDMAE

pub fn tdmae(&mut self) -> TDMAE_W<'_>

Bit 1 - TDMAE

impl W<u32, Reg<u32, _DMA_TDLR>>

pub fn value(&mut self) -> VALUE_W<'_>

Bits 0:2 - VALUE

impl W<u32, Reg<u32, _DMA_RDLR>>

pub fn value(&mut self) -> VALUE_W<'_>

Bits 0:2 - VALUE

impl W<u32, Reg<u32, _SDA_SETUP>>

pub fn value(&mut self) -> VALUE_W<'_>

Bits 0:7 - VALUE

impl W<u32, Reg<u32, _GENERAL_CALL>>

pub fn call_enable(&mut self) -> CALL_ENABLE_W<'_>

Bit 0 - CALL_ENABLE

impl W<u32, Reg<u32, _FS_SPKLEN>>

pub fn value(&mut self) -> VALUE_W<'_>

Bits 0:7 - VALUE

impl W<u32, Reg<u32, _IO>>

pub fn ch_sel(&mut self) -> CH_SEL_W<'_>

Bits 0:7 - Channel select from 256 input

pub fn ds(&mut self) -> DS_W<'_>

Bits 8:11 - Driving selector

pub fn oe_en(&mut self) -> OE_EN_W<'_>

Bit 12 - Static output enable, will AND with OE_INV

pub fn oe_inv(&mut self) -> OE_INV_W<'_>

Bit 13 - Invert output enable

pub fn do_sel(&mut self) -> DO_SEL_W<'_>

Bit 14 - Data output select: 0 for DO, 1 for OE

pub fn do_inv(&mut self) -> DO_INV_W<'_>

Bit 15 - Invert the result of data output select (DO_SEL)

pub fn pu(&mut self) -> PU_W<'_>

Bit 16 - Pull up enable. 0 for nothing, 1 for pull up

pub fn pd(&mut self) -> PD_W<'_>

Bit 17 - Pull down enable. 0 for nothing, 1 for pull down

pub fn sl(&mut self) -> SL_W<'_>

Bit 19 - Slew rate control enable

pub fn ie_en(&mut self) -> IE_EN_W<'_>

Bit 20 - Static input enable, will AND with IE_INV

pub fn ie_inv(&mut self) -> IE_INV_W<'_>

Bit 21 - Invert input enable

pub fn di_inv(&mut self) -> DI_INV_W<'_>

Bit 22 - Invert Data input

pub fn st(&mut self) -> ST_W<'_>

Bit 23 - Schmitt trigger

pub fn pad_di(&mut self) -> PAD_DI_W<'_>

Bit 31 - Read current IO’s data input

impl W<u32, Reg<u32, _NUM_REG>>

pub fn data_cnt(&mut self) -> DATA_CNT_W<'_>

Bits 0:15 - The total amount of data calculated by SHA256 is set by this register, and the smallest unit is 512bit

pub fn data_num(&mut self) -> DATA_NUM_W<'_>

Bits 16:31 - Currently calculated block number. 512bit=1block

impl W<u32, Reg<u32, _FUNCTION_REG_0>>

pub fn en(&mut self) -> EN_W<'_>

Bit 0 - write:SHA256 enable register. read:Calculation completed flag

pub fn overflow(&mut self) -> OVERFLOW_W<'_>

Bit 8 - SHA256 calculation overflow flag

pub fn endian(&mut self) -> ENDIAN_W<'_>

Bit 16 - Endian setting

impl W<u32, Reg<u32, _FUNCTION_REG_1>>

pub fn dma_en(&mut self) -> DMA_EN_W<'_>

Bit 0 - SHA and DMA handshake signals enable. 1:enable; 0:disable

pub fn fifo_in_full(&mut self) -> FIFO_IN_FULL_W<'_>

Bit 8 - 1:SHA256 input fifo is full; 0:not full

impl W<u32, Reg<u32, _CONTROL>>

pub fn enable(&mut self) -> ENABLE_W<'_>

Bit 0 - ENABLE

pub fn mode(&mut self) -> MODE_W<'_>

Bit 1 - MODE

pub fn interrupt(&mut self) -> INTERRUPT_W<'_>

Bit 2 - INTERRUPT_MASK

pub fn pwm_enable(&mut self) -> PWM_ENABLE_W<'_>

Bit 3 - PWM_ENABLE

impl W<u32, Reg<u32, _CR>>

pub fn enable(&mut self) -> ENABLE_W<'_>

Bit 0 - enable

pub fn rmod(&mut self) -> RMOD_W<'_>

Bit 1 - rmod

pub fn rpl(&mut self) -> RPL_W<'_>

Bits 2:4 - rpl

impl W<u32, Reg<u32, _TORR>>

pub fn top0(&mut self) -> TOP0_W<'_>

Bits 0:3 - top (lower half)

pub fn top1(&mut self) -> TOP1_W<'_>

Bits 4:7 - top (upper half)

impl W<u32, Reg<u32, _STAT>>

pub fn stat(&mut self) -> STAT_W<'_>

Bit 0 - stat

impl W<u32, Reg<u32, _EOI>>

pub fn eoi(&mut self) -> EOI_W<'_>

Bit 0 - eoi

impl W<u32, Reg<u32, _PROT_LEVEL>>

pub fn prot_level(&mut self) -> PROT_LEVEL_W<'_>

Bits 0:2 - prot_level

impl W<u32, Reg<u32, _COMP_PARAM_5>>

pub fn user_top_max(&mut self) -> USER_TOP_MAX_W<'_>

Bits 0:31 - user_top_max

impl W<u32, Reg<u32, _COMP_PARAM_4>>

pub fn user_top_init_max(&mut self) -> USER_TOP_INIT_MAX_W<'_>

Bits 0:31 - user_top_init_max

impl W<u32, Reg<u32, _COMP_PARAM_3>>

pub fn top_rst(&mut self) -> TOP_RST_W<'_>

Bits 0:31 - top_rst

impl W<u32, Reg<u32, _COMP_PARAM_2>>

pub fn cnt_rst(&mut self) -> CNT_RST_W<'_>

Bits 0:31 - cnt_rst

impl W<u32, Reg<u32, _COMP_PARAM_1>>

pub fn always_en(&mut self) -> ALWAYS_EN_W<'_>

Bit 0 - always_en

pub fn dflt_rmod(&mut self) -> DFLT_RMOD_W<'_>

Bit 1 - dflt_rmod

pub fn dual_top(&mut self) -> DUAL_TOP_W<'_>

Bit 2 - dual_top

pub fn hc_rmod(&mut self) -> HC_RMOD_W<'_>

Bit 3 - hc_rmod

pub fn hc_rpl(&mut self) -> HC_RPL_W<'_>

Bit 4 - hc_rpl

pub fn hc_top(&mut self) -> HC_TOP_W<'_>

Bit 5 - hc_top

pub fn use_fix_top(&mut self) -> USE_FIX_TOP_W<'_>

Bit 6 - use_fix_top

pub fn pause(&mut self) -> PAUSE_W<'_>

Bit 7 - pause

pub fn apb_data_width(&mut self) -> APB_DATA_WIDTH_W<'_>

Bits 8:9 - apb_data_width

pub fn dflt_rpl(&mut self) -> DFLT_RPL_W<'_>

Bits 10:12 - dflt_rpl

pub fn dflt_top(&mut self) -> DFLT_TOP_W<'_>

Bits 16:19 - dflt_top

pub fn dflt_top_init(&mut self) -> DFLT_TOP_INIT_W<'_>

Bits 20:23 - dflt_top_init

pub fn cnt_width(&mut self) -> CNT_WIDTH_W<'_>

Bits 24:28 - cnt_width

impl W<u32, Reg<u32, _DVP_CFG>>

pub fn start_int_enable(&mut self) -> START_INT_ENABLE_W<'_>

Bit 0 - START_INT_ENABLE

pub fn finish_int_enable(&mut self) -> FINISH_INT_ENABLE_W<'_>

Bit 1 - FINISH_INT_ENABLE

pub fn ai_output_enable(&mut self) -> AI_OUTPUT_ENABLE_W<'_>

Bit 2 - AI_OUTPUT_ENABLE

pub fn display_output_enable(&mut self) -> DISPLAY_OUTPUT_ENABLE_W<'_>

Bit 3 - DISPLAY_OUTPUT_ENABLE

pub fn auto_enable(&mut self) -> AUTO_ENABLE_W<'_>

Bit 4 - AUTO_ENABLE

pub fn burst_size_4beats(&mut self) -> BURST_SIZE_4BEATS_W<'_>

Bit 8 - BURST_SIZE_4BEATS

pub fn format(&mut self) -> FORMAT_W<'_>

Bits 9:10 - FORMAT

pub fn href_burst_num(&mut self) -> HREF_BURST_NUM_W<'_>

Bits 12:19 - HREF_BURST_NUM

pub fn line_num(&mut self) -> LINE_NUM_W<'_>

Bits 20:29 - LINE_NUM

impl W<u32, Reg<u32, _CMOS_CFG>>

pub fn clk_div(&mut self) -> CLK_DIV_W<'_>

Bits 0:7 - CLK_DIV

pub fn clk_enable(&mut self) -> CLK_ENABLE_W<'_>

Bit 8 - CLK_ENABLE

pub fn reset(&mut self) -> RESET_W<'_>

Bit 16 - RESET

pub fn power_down(&mut self) -> POWER_DOWN_W<'_>

Bit 24 - POWER_DOWN

impl W<u32, Reg<u32, _SCCB_CFG>>

pub fn byte_num(&mut self) -> BYTE_NUM_W<'_>

Bits 0:1 - BYTE_NUM

pub fn scl_lcnt(&mut self) -> SCL_LCNT_W<'_>

Bits 8:15 - SCL_LCNT

pub fn scl_hcnt(&mut self) -> SCL_HCNT_W<'_>

Bits 16:23 - SCL_HCNT

impl W<u32, Reg<u32, _SCCB_CTL>>

pub fn device_address(&mut self) -> DEVICE_ADDRESS_W<'_>

Bits 0:7 - DEVICE_ADDRESS

pub fn reg_address(&mut self) -> REG_ADDRESS_W<'_>

Bits 8:15 - REG_ADDRESS

pub fn wdata_byte0(&mut self) -> WDATA_BYTE0_W<'_>

Bits 16:23 - WDATA_BYTE0

pub fn wdata_byte1(&mut self) -> WDATA_BYTE1_W<'_>

Bits 24:31 - WDATA_BYTE1

impl W<u32, Reg<u32, _AXI>>

pub fn gm_mlen(&mut self) -> GM_MLEN_W<'_>

Bits 0:7 - GM_MLEN

impl W<u32, Reg<u32, _STS>>

pub fn frame_start(&mut self) -> FRAME_START_W<'_>

Bit 0 - FRAME_START

pub fn frame_start_we(&mut self) -> FRAME_START_WE_W<'_>

Bit 1 - FRAME_START_WE

pub fn frame_finish(&mut self) -> FRAME_FINISH_W<'_>

Bit 8 - FRAME_FINISH

pub fn frame_finish_we(&mut self) -> FRAME_FINISH_WE_W<'_>

Bit 9 - FRAME_FINISH_WE

pub fn dvp_en(&mut self) -> DVP_EN_W<'_>

Bit 16 - DVP_EN

pub fn dvp_en_we(&mut self) -> DVP_EN_WE_W<'_>

Bit 17 - DVP_EN_WE

pub fn sccb_en(&mut self) -> SCCB_EN_W<'_>

Bit 24 - SCCB_EN

pub fn sccb_en_we(&mut self) -> SCCB_EN_WE_W<'_>

Bit 25 - SCCB_EN_WE

impl W<u32, Reg<u32, _PLL0>>

pub fn clkr(&mut self) -> CLKR_W<'_>

Bits 0:3

pub fn clkf(&mut self) -> CLKF_W<'_>

Bits 4:9

pub fn clkod(&mut self) -> CLKOD_W<'_>

Bits 10:13

pub fn bwadj(&mut self) -> BWADJ_W<'_>

Bits 14:19

pub fn reset(&mut self) -> RESET_W<'_>

Bit 20

pub fn pwrd(&mut self) -> PWRD_W<'_>

Bit 21

pub fn intfb(&mut self) -> INTFB_W<'_>

Bit 22

pub fn bypass(&mut self) -> BYPASS_W<'_>

Bit 23

pub fn test(&mut self) -> TEST_W<'_>

Bit 24

pub fn out_en(&mut self) -> OUT_EN_W<'_>

Bit 25

pub fn test_en(&mut self) -> TEST_EN_W<'_>

Bit 26

impl W<u32, Reg<u32, _PLL1>>

pub fn clkr(&mut self) -> CLKR_W<'_>

Bits 0:3

pub fn clkf(&mut self) -> CLKF_W<'_>

Bits 4:9

pub fn clkod(&mut self) -> CLKOD_W<'_>

Bits 10:13

pub fn bwadj(&mut self) -> BWADJ_W<'_>

Bits 14:19

pub fn reset(&mut self) -> RESET_W<'_>

Bit 20

pub fn pwrd(&mut self) -> PWRD_W<'_>

Bit 21

pub fn intfb(&mut self) -> INTFB_W<'_>

Bit 22

pub fn bypass(&mut self) -> BYPASS_W<'_>

Bit 23

pub fn test(&mut self) -> TEST_W<'_>

Bit 24

pub fn out_en(&mut self) -> OUT_EN_W<'_>

Bit 25

impl W<u32, Reg<u32, _PLL2>>

pub fn clkr(&mut self) -> CLKR_W<'_>

Bits 0:3

pub fn clkf(&mut self) -> CLKF_W<'_>

Bits 4:9

pub fn clkod(&mut self) -> CLKOD_W<'_>

Bits 10:13

pub fn bwadj(&mut self) -> BWADJ_W<'_>

Bits 14:19

pub fn reset(&mut self) -> RESET_W<'_>

Bit 20

pub fn pwrd(&mut self) -> PWRD_W<'_>

Bit 21

pub fn intfb(&mut self) -> INTFB_W<'_>

Bit 22

pub fn bypass(&mut self) -> BYPASS_W<'_>

Bit 23

pub fn test(&mut self) -> TEST_W<'_>

Bit 24

pub fn out_en(&mut self) -> OUT_EN_W<'_>

Bit 25

pub fn ckin_sel(&mut self) -> CKIN_SEL_W<'_>

Bits 26:27

impl W<u32, Reg<u32, _PLL_LOCK>>

pub fn pll_lock0(&mut self) -> PLL_LOCK0_W<'_>

Bits 0:1

pub fn pll_slip_clear0(&mut self) -> PLL_SLIP_CLEAR0_W<'_>

Bit 2

pub fn test_clk_out0(&mut self) -> TEST_CLK_OUT0_W<'_>

Bit 3

pub fn pll_lock1(&mut self) -> PLL_LOCK1_W<'_>

Bits 8:9

pub fn pll_slip_clear1(&mut self) -> PLL_SLIP_CLEAR1_W<'_>

Bit 10

pub fn test_clk_out1(&mut self) -> TEST_CLK_OUT1_W<'_>

Bit 11

pub fn pll_lock2(&mut self) -> PLL_LOCK2_W<'_>

Bits 16:17

pub fn pll_slip_clear2(&mut self) -> PLL_SLIP_CLEAR2_W<'_>

Bit 18

pub fn test_clk_out2(&mut self) -> TEST_CLK_OUT2_W<'_>

Bit 19

impl W<u32, Reg<u32, _ROM_ERROR>>

pub fn rom_mul_error(&mut self) -> ROM_MUL_ERROR_W<'_>

Bit 0

pub fn rom_one_error(&mut self) -> ROM_ONE_ERROR_W<'_>

Bit 1

impl W<u32, Reg<u32, _CLK_SEL0>>

pub fn aclk_sel(&mut self) -> ACLK_SEL_W<'_>

Bit 0

pub fn aclk_divider_sel(&mut self) -> ACLK_DIVIDER_SEL_W<'_>

Bits 1:2

pub fn apb0_clk_sel(&mut self) -> APB0_CLK_SEL_W<'_>

Bits 3:5

pub fn apb1_clk_sel(&mut self) -> APB1_CLK_SEL_W<'_>

Bits 6:8

pub fn apb2_clk_sel(&mut self) -> APB2_CLK_SEL_W<'_>

Bits 9:11

pub fn spi3_clk_sel(&mut self) -> SPI3_CLK_SEL_W<'_>

Bit 12

pub fn timer0_clk_sel(&mut self) -> TIMER0_CLK_SEL_W<'_>

Bit 13

pub fn timer1_clk_sel(&mut self) -> TIMER1_CLK_SEL_W<'_>

Bit 14

pub fn timer2_clk_sel(&mut self) -> TIMER2_CLK_SEL_W<'_>

Bit 15

impl W<u32, Reg<u32, _CLK_SEL1>>

pub fn spi3_sample_clk_sel(&mut self) -> SPI3_SAMPLE_CLK_SEL_W<'_>

Bit 0

impl W<u32, Reg<u32, _CLK_EN_CENT>>

pub fn cpu_clk_en(&mut self) -> CPU_CLK_EN_W<'_>

Bit 0

pub fn sram0_clk_en(&mut self) -> SRAM0_CLK_EN_W<'_>

Bit 1

pub fn sram1_clk_en(&mut self) -> SRAM1_CLK_EN_W<'_>

Bit 2

pub fn apb0_clk_en(&mut self) -> APB0_CLK_EN_W<'_>

Bit 3

pub fn apb1_clk_en(&mut self) -> APB1_CLK_EN_W<'_>

Bit 4

pub fn apb2_clk_en(&mut self) -> APB2_CLK_EN_W<'_>

Bit 5

impl W<u32, Reg<u32, _CLK_EN_PERI>>

pub fn rom_clk_en(&mut self) -> ROM_CLK_EN_W<'_>

Bit 0

pub fn dma_clk_en(&mut self) -> DMA_CLK_EN_W<'_>

Bit 1

pub fn ai_clk_en(&mut self) -> AI_CLK_EN_W<'_>

Bit 2

pub fn dvp_clk_en(&mut self) -> DVP_CLK_EN_W<'_>

Bit 3

pub fn fft_clk_en(&mut self) -> FFT_CLK_EN_W<'_>

Bit 4

pub fn gpio_clk_en(&mut self) -> GPIO_CLK_EN_W<'_>

Bit 5

pub fn spi0_clk_en(&mut self) -> SPI0_CLK_EN_W<'_>

Bit 6

pub fn spi1_clk_en(&mut self) -> SPI1_CLK_EN_W<'_>

Bit 7

pub fn spi2_clk_en(&mut self) -> SPI2_CLK_EN_W<'_>

Bit 8

pub fn spi3_clk_en(&mut self) -> SPI3_CLK_EN_W<'_>

Bit 9

pub fn i2s0_clk_en(&mut self) -> I2S0_CLK_EN_W<'_>

Bit 10

pub fn i2s1_clk_en(&mut self) -> I2S1_CLK_EN_W<'_>

Bit 11

pub fn i2s2_clk_en(&mut self) -> I2S2_CLK_EN_W<'_>

Bit 12

pub fn i2c0_clk_en(&mut self) -> I2C0_CLK_EN_W<'_>

Bit 13

pub fn i2c1_clk_en(&mut self) -> I2C1_CLK_EN_W<'_>

Bit 14

pub fn i2c2_clk_en(&mut self) -> I2C2_CLK_EN_W<'_>

Bit 15

pub fn uart1_clk_en(&mut self) -> UART1_CLK_EN_W<'_>

Bit 16

pub fn uart2_clk_en(&mut self) -> UART2_CLK_EN_W<'_>

Bit 17

pub fn uart3_clk_en(&mut self) -> UART3_CLK_EN_W<'_>

Bit 18

pub fn aes_clk_en(&mut self) -> AES_CLK_EN_W<'_>

Bit 19

pub fn fpioa_clk_en(&mut self) -> FPIOA_CLK_EN_W<'_>

Bit 20

pub fn timer0_clk_en(&mut self) -> TIMER0_CLK_EN_W<'_>

Bit 21

pub fn timer1_clk_en(&mut self) -> TIMER1_CLK_EN_W<'_>

Bit 22

pub fn timer2_clk_en(&mut self) -> TIMER2_CLK_EN_W<'_>

Bit 23

pub fn wdt0_clk_en(&mut self) -> WDT0_CLK_EN_W<'_>

Bit 24

pub fn wdt1_clk_en(&mut self) -> WDT1_CLK_EN_W<'_>

Bit 25

pub fn sha_clk_en(&mut self) -> SHA_CLK_EN_W<'_>

Bit 26

pub fn otp_clk_en(&mut self) -> OTP_CLK_EN_W<'_>

Bit 27

pub fn rtc_clk_en(&mut self) -> RTC_CLK_EN_W<'_>

Bit 29

impl W<u32, Reg<u32, _SOFT_RESET>>

pub fn soft_reset(&mut self) -> SOFT_RESET_W<'_>

Bit 0

impl W<u32, Reg<u32, _PERI_RESET>>

pub fn rom_reset(&mut self) -> ROM_RESET_W<'_>

Bit 0

pub fn dma_reset(&mut self) -> DMA_RESET_W<'_>

Bit 1

pub fn ai_reset(&mut self) -> AI_RESET_W<'_>

Bit 2

pub fn dvp_reset(&mut self) -> DVP_RESET_W<'_>

Bit 3

pub fn fft_reset(&mut self) -> FFT_RESET_W<'_>

Bit 4

pub fn gpio_reset(&mut self) -> GPIO_RESET_W<'_>

Bit 5

pub fn spi0_reset(&mut self) -> SPI0_RESET_W<'_>

Bit 6

pub fn spi1_reset(&mut self) -> SPI1_RESET_W<'_>

Bit 7

pub fn spi2_reset(&mut self) -> SPI2_RESET_W<'_>

Bit 8

pub fn spi3_reset(&mut self) -> SPI3_RESET_W<'_>

Bit 9

pub fn i2s0_reset(&mut self) -> I2S0_RESET_W<'_>

Bit 10

pub fn i2s1_reset(&mut self) -> I2S1_RESET_W<'_>

Bit 11

pub fn i2s2_reset(&mut self) -> I2S2_RESET_W<'_>

Bit 12

pub fn i2c0_reset(&mut self) -> I2C0_RESET_W<'_>

Bit 13

pub fn i2c1_reset(&mut self) -> I2C1_RESET_W<'_>

Bit 14

pub fn i2c2_reset(&mut self) -> I2C2_RESET_W<'_>

Bit 15

pub fn uart1_reset(&mut self) -> UART1_RESET_W<'_>

Bit 16

pub fn uart2_reset(&mut self) -> UART2_RESET_W<'_>

Bit 17

pub fn uart3_reset(&mut self) -> UART3_RESET_W<'_>

Bit 18

pub fn aes_reset(&mut self) -> AES_RESET_W<'_>

Bit 19

pub fn fpioa_reset(&mut self) -> FPIOA_RESET_W<'_>

Bit 20

pub fn timer0_reset(&mut self) -> TIMER0_RESET_W<'_>

Bit 21

pub fn timer1_reset(&mut self) -> TIMER1_RESET_W<'_>

Bit 22

pub fn timer2_reset(&mut self) -> TIMER2_RESET_W<'_>

Bit 23

pub fn wdt0_reset(&mut self) -> WDT0_RESET_W<'_>

Bit 24

pub fn wdt1_reset(&mut self) -> WDT1_RESET_W<'_>

Bit 25

pub fn sha_reset(&mut self) -> SHA_RESET_W<'_>

Bit 26

pub fn rtc_reset(&mut self) -> RTC_RESET_W<'_>

Bit 29

impl W<u32, Reg<u32, _CLK_TH0>>

pub fn sram0_gclk(&mut self) -> SRAM0_GCLK_W<'_>

Bits 0:3

pub fn sram1_gclk(&mut self) -> SRAM1_GCLK_W<'_>

Bits 4:7

pub fn ai_gclk(&mut self) -> AI_GCLK_W<'_>

Bits 8:11

pub fn dvp_gclk(&mut self) -> DVP_GCLK_W<'_>

Bits 12:15

pub fn rom_gclk(&mut self) -> ROM_GCLK_W<'_>

Bits 16:19

impl W<u32, Reg<u32, _CLK_TH1>>

pub fn spi0_clk(&mut self) -> SPI0_CLK_W<'_>

Bits 0:7

pub fn spi1_clk(&mut self) -> SPI1_CLK_W<'_>

Bits 8:15

pub fn spi2_clk(&mut self) -> SPI2_CLK_W<'_>

Bits 16:23

pub fn spi3_clk(&mut self) -> SPI3_CLK_W<'_>

Bits 24:31

impl W<u32, Reg<u32, _CLK_TH2>>

pub fn timer0_clk(&mut self) -> TIMER0_CLK_W<'_>

Bits 0:7

pub fn timer1_clk(&mut self) -> TIMER1_CLK_W<'_>

Bits 8:15

pub fn timer2_clk(&mut self) -> TIMER2_CLK_W<'_>

Bits 16:23

impl W<u32, Reg<u32, _CLK_TH3>>

pub fn i2s0_clk(&mut self) -> I2S0_CLK_W<'_>

Bits 0:15

pub fn i2s1_clk(&mut self) -> I2S1_CLK_W<'_>

Bits 16:31

impl W<u32, Reg<u32, _CLK_TH4>>

pub fn i2s2_clk(&mut self) -> I2S2_CLK_W<'_>

Bits 0:15

pub fn i2s0_mclk(&mut self) -> I2S0_MCLK_W<'_>

Bits 16:23

pub fn i2s1_mclk(&mut self) -> I2S1_MCLK_W<'_>

Bits 24:31

impl W<u32, Reg<u32, _CLK_TH5>>

pub fn i2s2_mclk(&mut self) -> I2S2_MCLK_W<'_>

Bits 0:7

pub fn i2c0_clk(&mut self) -> I2C0_CLK_W<'_>

Bits 8:15

pub fn i2c1_clk(&mut self) -> I2C1_CLK_W<'_>

Bits 16:23

pub fn i2c2_clk(&mut self) -> I2C2_CLK_W<'_>

Bits 24:31

impl W<u32, Reg<u32, _CLK_TH6>>

pub fn wdt0_clk(&mut self) -> WDT0_CLK_W<'_>

Bits 0:7

pub fn wdt1_clk(&mut self) -> WDT1_CLK_W<'_>

Bits 8:15

impl W<u32, Reg<u32, _MISC>>

pub fn debug_sel(&mut self) -> DEBUG_SEL_W<'_>

Bits 0:5

pub fn spi_dvp_data_enable(&mut self) -> SPI_DVP_DATA_ENABLE_W<'_>

Bit 10

impl W<u32, Reg<u32, _PERI>>

pub fn timer0_pause(&mut self) -> TIMER0_PAUSE_W<'_>

Bit 0

pub fn timer1_pause(&mut self) -> TIMER1_PAUSE_W<'_>

Bit 1

pub fn timer2_pause(&mut self) -> TIMER2_PAUSE_W<'_>

Bit 2

pub fn timer3_pause(&mut self) -> TIMER3_PAUSE_W<'_>

Bit 3

pub fn timer4_pause(&mut self) -> TIMER4_PAUSE_W<'_>

Bit 4

pub fn timer5_pause(&mut self) -> TIMER5_PAUSE_W<'_>

Bit 5

pub fn timer6_pause(&mut self) -> TIMER6_PAUSE_W<'_>

Bit 6

pub fn timer7_pause(&mut self) -> TIMER7_PAUSE_W<'_>

Bit 7

pub fn timer8_pause(&mut self) -> TIMER8_PAUSE_W<'_>

Bit 8

pub fn timer9_pause(&mut self) -> TIMER9_PAUSE_W<'_>

Bit 9

pub fn timer10_pause(&mut self) -> TIMER10_PAUSE_W<'_>

Bit 10

pub fn timer11_pause(&mut self) -> TIMER11_PAUSE_W<'_>

Bit 11

pub fn spi0_xip_en(&mut self) -> SPI0_XIP_EN_W<'_>

Bit 12

pub fn spi1_xip_en(&mut self) -> SPI1_XIP_EN_W<'_>

Bit 13

pub fn spi2_xip_en(&mut self) -> SPI2_XIP_EN_W<'_>

Bit 14

pub fn spi3_xip_en(&mut self) -> SPI3_XIP_EN_W<'_>

Bit 15

pub fn spi0_clk_bypass(&mut self) -> SPI0_CLK_BYPASS_W<'_>

Bit 16

pub fn spi1_clk_bypass(&mut self) -> SPI1_CLK_BYPASS_W<'_>

Bit 17

pub fn spi2_clk_bypass(&mut self) -> SPI2_CLK_BYPASS_W<'_>

Bit 18

pub fn i2s0_clk_bypass(&mut self) -> I2S0_CLK_BYPASS_W<'_>

Bit 19

pub fn i2s1_clk_bypass(&mut self) -> I2S1_CLK_BYPASS_W<'_>

Bit 20

pub fn i2s2_clk_bypass(&mut self) -> I2S2_CLK_BYPASS_W<'_>

Bit 21

pub fn jtag_clk_bypass(&mut self) -> JTAG_CLK_BYPASS_W<'_>

Bit 22

pub fn dvp_clk_bypass(&mut self) -> DVP_CLK_BYPASS_W<'_>

Bit 23

pub fn debug_clk_bypass(&mut self) -> DEBUG_CLK_BYPASS_W<'_>

Bit 24

impl W<u32, Reg<u32, _SPI_SLEEP>>

pub fn ssi0_sleep(&mut self) -> SSI0_SLEEP_W<'_>

Bit 0

pub fn ssi1_sleep(&mut self) -> SSI1_SLEEP_W<'_>

Bit 1

pub fn ssi2_sleep(&mut self) -> SSI2_SLEEP_W<'_>

Bit 2

pub fn ssi3_sleep(&mut self) -> SSI3_SLEEP_W<'_>

Bit 3

impl W<u32, Reg<u32, _RESET_STATUS>>

pub fn reset_sts_clr(&mut self) -> RESET_STS_CLR_W<'_>

Bit 0

pub fn pin_reset_sts(&mut self) -> PIN_RESET_STS_W<'_>

Bit 1

pub fn wdt0_reset_sts(&mut self) -> WDT0_RESET_STS_W<'_>

Bit 2

pub fn wdt1_reset_sts(&mut self) -> WDT1_RESET_STS_W<'_>

Bit 3

pub fn soft_reset_sts(&mut self) -> SOFT_RESET_STS_W<'_>

Bit 4

impl W<u32, Reg<u32, _DMA_SEL0>>

pub fn dma_sel0(&mut self) -> DMA_SEL0_W<'_>

Bits 0:5

pub fn dma_sel1(&mut self) -> DMA_SEL1_W<'_>

Bits 6:11

pub fn dma_sel2(&mut self) -> DMA_SEL2_W<'_>

Bits 12:17

pub fn dma_sel3(&mut self) -> DMA_SEL3_W<'_>

Bits 18:23

pub fn dma_sel4(&mut self) -> DMA_SEL4_W<'_>

Bits 24:29

impl W<u32, Reg<u32, _DMA_SEL1>>

pub fn dma_sel5(&mut self) -> DMA_SEL5_W<'_>

Bits 0:5

impl W<u32, Reg<u32, _POWER_SEL>>

pub fn power_mode_sel0(&mut self) -> POWER_MODE_SEL0_W<'_>

Bit 0

pub fn power_mode_sel1(&mut self) -> POWER_MODE_SEL1_W<'_>

Bit 1

pub fn power_mode_sel2(&mut self) -> POWER_MODE_SEL2_W<'_>

Bit 2

pub fn power_mode_sel3(&mut self) -> POWER_MODE_SEL3_W<'_>

Bit 3

pub fn power_mode_sel4(&mut self) -> POWER_MODE_SEL4_W<'_>

Bit 4

pub fn power_mode_sel5(&mut self) -> POWER_MODE_SEL5_W<'_>

Bit 5

pub fn power_mode_sel6(&mut self) -> POWER_MODE_SEL6_W<'_>

Bit 6

pub fn power_mode_sel7(&mut self) -> POWER_MODE_SEL7_W<'_>

Bit 7

impl W<u32, Reg<u32, _ENCRYPT_SEL>>

pub fn encrypt_sel(&mut self) -> ENCRYPT_SEL_W<'_>

Bit 0 - Select encryption or decryption mode

impl W<u32, Reg<u32, _MODE_CTL>>

pub fn cipher_mode(&mut self) -> CIPHER_MODE_W<'_>

Bits 0:2 - Cipher mode

pub fn key_mode(&mut self) -> KEY_MODE_W<'_>

Bits 3:4 - Key mode

pub fn key_order(&mut self) -> KEY_ORDER_W<'_>

Bit 5 - Input key order

pub fn input_order(&mut self) -> INPUT_ORDER_W<'_>

Bit 7 - Input data order

pub fn output_order(&mut self) -> OUTPUT_ORDER_W<'_>

Bit 9 - Output data order

impl W<u32, Reg<u32, _ENDIAN>>

pub fn endian(&mut self) -> ENDIAN_W<'_>

Bit 0 - Input data endian

impl W<u32, Reg<u32, _FINISH>>

pub fn finish(&mut self) -> FINISH_W<'_>

Bit 0 - AES operation finished status

impl W<u32, Reg<u32, _DMA_SEL>>

pub fn dma_sel(&mut self) -> DMA_SEL_W<'_>

Bit 0 - Output to DMA if set, to CPU otherwise

impl W<u32, Reg<u32, _TAG_CHK>>

pub fn tag_chk(&mut self) -> TAG_CHK_W<'_>

Bits 0:1 - Tag check status

impl W<u32, Reg<u32, _DATA_IN_FLAG>>

pub fn data_in_flag(&mut self) -> DATA_IN_FLAG_W<'_>

Bit 0 - Data can be written to text_data or aad_data when this flag is set

impl W<u32, Reg<u32, _EN>>

pub fn en(&mut self) -> EN_W<'_>

Bit 0 - AES module enable

impl W<u32, Reg<u32, _DATA_OUT_FLAG>>

pub fn data_out_flag(&mut self) -> DATA_OUT_FLAG_W<'_>

Bit 0 - Data can be read from out_data when this flag is set

impl W<u32, Reg<u32, _TAG_IN_FLAG>>

pub fn tag_in_flag(&mut self) -> TAG_IN_FLAG_W<'_>

Bit 0 - GCM tag can be written to gcm_in_tag when this flag is set

impl W<u32, Reg<u32, _DATE>>

pub fn week(&mut self) -> WEEK_W<'_>

Bits 0:2 - Week. Range [0,6]. 0 is Sunday.

pub fn day(&mut self) -> DAY_W<'_>

Bits 8:12 - Day. Range [1,31] or [1,30] or [1,29] or [1,28]

pub fn month(&mut self) -> MONTH_W<'_>

Bits 16:19 - Month. Range [1,12]

pub fn year(&mut self) -> YEAR_W<'_>

Bits 20:31 - Year. Range [0,99]

impl W<u32, Reg<u32, _TIME>>

pub fn second(&mut self) -> SECOND_W<'_>

Bits 10:15 - Second. Range [0,59]

pub fn minute(&mut self) -> MINUTE_W<'_>

Bits 16:21 - Minute. Range [0,59]

pub fn hour(&mut self) -> HOUR_W<'_>

Bits 24:28 - Hour. Range [0,23]

impl W<u32, Reg<u32, _ALARM_DATE>>

pub fn week(&mut self) -> WEEK_W<'_>

Bits 0:2 - Week. Range [0,6]. 0 is Sunday.

pub fn day(&mut self) -> DAY_W<'_>

Bits 8:12 - Day. Range [1,31] or [1,30] or [1,29] or [1,28]

pub fn month(&mut self) -> MONTH_W<'_>

Bits 16:19 - Month. Range [1,12]

pub fn year(&mut self) -> YEAR_W<'_>

Bits 20:31 - Year. Range [0,99]

impl W<u32, Reg<u32, _ALARM_TIME>>

pub fn second(&mut self) -> SECOND_W<'_>

Bits 10:15 - Second. Range [0,59]

pub fn minute(&mut self) -> MINUTE_W<'_>

Bits 16:21 - Minute. Range [0,59]

pub fn hour(&mut self) -> HOUR_W<'_>

Bits 24:28 - Hour. Range [0,23]

impl W<u32, Reg<u32, _INITIAL_COUNT>>

pub fn count(&mut self) -> COUNT_W<'_>

Bits 0:31 - RTC counter initial value

impl W<u32, Reg<u32, _CURRENT_COUNT>>

pub fn count(&mut self) -> COUNT_W<'_>

Bits 0:31 - RTC counter current value

impl W<u32, Reg<u32, _INTERRUPT_CTRL>>

pub fn tick_enable(&mut self) -> TICK_ENABLE_W<'_>

Bit 0 - TICK_ENABLE

pub fn alarm_enable(&mut self) -> ALARM_ENABLE_W<'_>

Bit 1 - Alarm interrupt enable

pub fn tick_int_mode(&mut self) -> TICK_INT_MODE_W<'_>

Bits 2:3 - Tick interrupt enable

pub fn alarm_compare_mask(&mut self) -> ALARM_COMPARE_MASK_W<'_>

Bits 24:31 - Alarm compare mask for interrupt

impl W<u32, Reg<u32, _REGISTER_CTRL>>

pub fn read_enable(&mut self) -> READ_ENABLE_W<'_>

Bit 0 - RTC timer read enable

pub fn write_enable(&mut self) -> WRITE_ENABLE_W<'_>

Bit 1 - RTC timer write enable

pub fn timer_mask(&mut self) -> TIMER_MASK_W<'_>

Bits 13:20 - RTC timer mask

pub fn alarm_mask(&mut self) -> ALARM_MASK_W<'_>

Bits 21:28 - RTC alarm mask

pub fn initial_count_mask(&mut self) -> INITIAL_COUNT_MASK_W<'_>

Bit 29 - RTC counter initial count value mask

pub fn interrupt_register_mask(&mut self) -> INTERRUPT_REGISTER_MASK_W<'_>

Bit 30 - RTC interrupt register mask

impl W<u32, Reg<u32, _EXTENDED>>

pub fn century(&mut self) -> CENTURY_W<'_>

Bits 0:4 - Century. Range [0,31]

pub fn leap_year(&mut self) -> LEAP_YEAR_W<'_>

Bit 5 - Is leap year. 1 is leap year, 0 is not leap year