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#[doc = "Reader of register CTL1"] pub type R = crate::R<u32, super::CTL1>; #[doc = "Writer for register CTL1"] pub type W = crate::W<u32, super::CTL1>; #[doc = "Register CTL1 `reset()`'s with value 0"] impl crate::ResetValue for super::CTL1 { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `ENABLE`"] pub type ENABLE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `ENABLE`"] pub struct ENABLE_W<'a> { w: &'a mut W, } impl<'a> ENABLE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } #[doc = "Reader of field `SCLFRQ`"] pub type SCLFRQ_R = crate::R<u8, u8>; #[doc = "Write proxy for field `SCLFRQ`"] pub struct SCLFRQ_W<'a> { w: &'a mut W, } impl<'a> SCLFRQ_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x7f << 1)) | (((value as u32) & 0x7f) << 1); self.w } } impl R { #[doc = "Bit 0 - Enable I2C"] #[inline(always)] pub fn enable(&self) -> ENABLE_R { ENABLE_R::new((self.bits & 0x01) != 0) } #[doc = "Bits 1:7"] #[inline(always)] pub fn sclfrq(&self) -> SCLFRQ_R { SCLFRQ_R::new(((self.bits >> 1) & 0x7f) as u8) } } impl W { #[doc = "Bit 0 - Enable I2C"] #[inline(always)] pub fn enable(&mut self) -> ENABLE_W { ENABLE_W { w: self } } #[doc = "Bits 1:7"] #[inline(always)] pub fn sclfrq(&mut self) -> SCLFRQ_W { SCLFRQ_W { w: self } } }