Struct imxrt1062_src::W

pub struct W<U, REG> { /* fields omitted */ }

Register writer

Used as an argument to the closures in the write and modify methods of the register

Methods

impl<U, REG> W<U, REG>

pub unsafe fn bits(&mut self, bits: U) -> &mut Self

Writes raw bits to the register

impl W<u32, Reg<u32, _SCR>>

pub fn mask_wdog_rst(&mut self) -> MASK_WDOG_RST_W

Bits 7:10 - Mask wdog_rst_b source

pub fn core0_rst(&mut self) -> CORE0_RST_W

Bit 13 - Software reset for core0 only

pub fn core0_dbg_rst(&mut self) -> CORE0_DBG_RST_W

Bit 17 - Software reset for core0 debug only

pub fn dbg_rst_msk_pg(&mut self) -> DBG_RST_MSK_PG_W

Bit 25 - Do not assert debug resets after power gating event of core

pub fn mask_wdog3_rst(&mut self) -> MASK_WDOG3_RST_W

Bits 28:31 - Mask wdog3_rst_b source

impl W<u32, Reg<u32, _SRSR>>

pub fn ipp_reset_b(&mut self) -> IPP_RESET_B_W

Bit 0 - Indicates whether reset was the result of ipp_reset_b pin (Power-up sequence)

pub fn lockup_sysresetreq(&mut self) -> LOCKUP_SYSRESETREQ_W

Bit 1 - Indicates a reset has been caused by CPU lockup or software setting of SYSRESETREQ bit in Application Interrupt and Reset Control Register of the ARM core

pub fn csu_reset_b(&mut self) -> CSU_RESET_B_W

Bit 2 - Indicates whether the reset was the result of the csu_reset_b input.

pub fn ipp_user_reset_b(&mut self) -> IPP_USER_RESET_B_W

Bit 3 - Indicates whether the reset was the result of the ipp_user_reset_b qualified reset.

pub fn wdog_rst_b(&mut self) -> WDOG_RST_B_W

Bit 4 - IC Watchdog Time-out reset

pub fn jtag_rst_b(&mut self) -> JTAG_RST_B_W

Bit 5 - HIGH - Z JTAG reset. Indicates whether the reset was the result of HIGH-Z reset from JTAG.

pub fn jtag_sw_rst(&mut self) -> JTAG_SW_RST_W

Bit 6 - JTAG software reset. Indicates whether the reset was the result of software reset from JTAG.

pub fn wdog3_rst_b(&mut self) -> WDOG3_RST_B_W

Bit 7 - IC Watchdog3 Time-out reset

pub fn tempsense_rst_b(&mut self) -> TEMPSENSE_RST_B_W

Bit 8 - Temper Sensor software reset

impl W<u32, Reg<u32, _GPR1>>

pub fn persistent_entry0(&mut self) -> PERSISTENT_ENTRY0_W

Bits 0:31 - Holds entry function for core0 for waking-up from low power mode

impl W<u32, Reg<u32, _GPR2>>

pub fn persistent_arg0(&mut self) -> PERSISTENT_ARG0_W

Bits 0:31 - Holds argument of entry function for core0 for waking-up from low power mode