[−][src]Module imxrt1062_semc::sramcr0
SRAM control register 0
Structs
| ADVH_W | Write proxy for field |
| ADVP_W | Write proxy for field |
| AM_W | Write proxy for field |
| BL_W | Write proxy for field |
| COL_W | Write proxy for field |
| PS_W | Write proxy for field |
| SYNCEN_W | Write proxy for field |
Enums
| ADVH_A | ADV# level control during address hold state |
| ADVP_A | ADV# polarity |
| AM_A | Address Mode |
| BL_A | Burst Length |
| COL_A | Column Address bit width |
| PS_A | Port Size |
| SYNCEN_A | Select SRAM controller mode. |
Type Definitions
| ADVH_R | Reader of field |
| ADVP_R | Reader of field |
| AM_R | Reader of field |
| BL_R | Reader of field |
| COL_R | Reader of field |
| PS_R | Reader of field |
| R | Reader of register SRAMCR0 |
| SYNCEN_R | Reader of field |
| W | Writer for register SRAMCR0 |