Module imxrt1062_pwm1::sm::smctrl2

Control 2 Register

Structs

CLK_SEL_W	Write proxy for field CLK_SEL
DBGEN_W	Write proxy for field DBGEN
FORCE_SEL_W	Write proxy for field FORCE_SEL
FORCE_W	Write proxy for field FORCE
FRCEN_W	Write proxy for field FRCEN
INDEP_W	Write proxy for field INDEP
INIT_SEL_W	Write proxy for field INIT_SEL
PWM23_INIT_W	Write proxy for field PWM23_INIT
PWM45_INIT_W	Write proxy for field PWM45_INIT
PWMX_INIT_W	Write proxy for field PWMX_INIT
RELOAD_SEL_W	Write proxy for field RELOAD_SEL
WAITEN_W	Write proxy for field WAITEN

Enums

CLK_SEL_A	Clock Source Select
FORCE_SEL_A	This read/write bit determines the source of the FORCE OUTPUT signal for this submodule.
FRCEN_A	FRCEN
INDEP_A	Independent or Complementary Pair Operation
INIT_SEL_A	Initialization Control Select
RELOAD_SEL_A	Reload Source Select

Type Definitions

CLK_SEL_R	Reader of field CLK_SEL
DBGEN_R	Reader of field DBGEN
FORCE_R	Reader of field FORCE
FORCE_SEL_R	Reader of field FORCE_SEL
FRCEN_R	Reader of field FRCEN
INDEP_R	Reader of field INDEP
INIT_SEL_R	Reader of field INIT_SEL
PWM23_INIT_R	Reader of field PWM23_INIT
PWM45_INIT_R	Reader of field PWM45_INIT
PWMX_INIT_R	Reader of field PWMX_INIT
R	Reader of register SMCTRL2
RELOAD_SEL_R	Reader of field RELOAD_SEL
W	Writer for register SMCTRL2
WAITEN_R	Reader of field WAITEN