[−][src]Module imxrt1062_pmu::reg_core_tog
Digital Regulator Core Register
Structs
| FET_ODRIVE_W | Write proxy for field |
| RAMP_RATE_W | Write proxy for field |
| REG0_ADJ_W | Write proxy for field |
| REG0_TARG_W | Write proxy for field |
| REG1_TARG_W | Write proxy for field |
| REG1_ADJ_W | Write proxy for field |
| REG2_TARG_W | Write proxy for field |
| REG2_ADJ_W | Write proxy for field |
Enums
| RAMP_RATE_A | Regulator voltage ramp rate. |
| REG0_ADJ_A | This bit field defines the adjustment bits to calibrate the target value of Reg0. The adjustment is applied on top on any adjustment applied to the global reference in the misc0 register. |
| REG0_TARG_A | This field defines the target voltage for the ARM core power domain |
| REG1_TARG_A | This bit field defines the target voltage for the vpu/gpu power domain. Single bit increments reflect 25mV core voltage steps. Not all steps will make sense to use either because of input supply limitations or load operation. |
| REG1_ADJ_A | This bit field defines the adjustment bits to calibrate the target value of Reg1. The adjustment is applied on top on any adjustment applied to the global reference in the misc0 register. |
| REG2_TARG_A | This field defines the target voltage for the SOC power domain |
| REG2_ADJ_A | This bit field defines the adjustment bits to calibrate the target value of Reg2. The adjustment is applied on top on any adjustment applied to the global reference in the misc0 register. |
Type Definitions
| FET_ODRIVE_R | Reader of field |
| R | Reader of register REG_CORE_TOG |
| RAMP_RATE_R | Reader of field |
| REG0_ADJ_R | Reader of field |
| REG0_TARG_R | Reader of field |
| REG1_TARG_R | Reader of field |
| REG1_ADJ_R | Reader of field |
| REG2_TARG_R | Reader of field |
| REG2_ADJ_R | Reader of field |
| W | Writer for register REG_CORE_TOG |