Crate imxrt1062_iomuxc

Modules

• anatop_usb_otg1_id_select_input
  ANATOP_USB_OTG1_ID_SELECT_INPUT DAISY Register
• anatop_usb_otg2_id_select_input
  ANATOP_USB_OTG2_ID_SELECT_INPUT DAISY Register
• canfd_ipp_ind_canrx_select_input
  CANFD_IPP_IND_CANRX_SELECT_INPUT DAISY Register
• ccm_pmic_ready_select_input
  CCM_PMIC_READY_SELECT_INPUT DAISY Register
• csi_data02_select_input
  CSI_DATA02_SELECT_INPUT DAISY Register
• csi_data03_select_input
  CSI_DATA03_SELECT_INPUT DAISY Register
• csi_data04_select_input
  CSI_DATA04_SELECT_INPUT DAISY Register
• csi_data05_select_input
  CSI_DATA05_SELECT_INPUT DAISY Register
• csi_data06_select_input
  CSI_DATA06_SELECT_INPUT DAISY Register
• csi_data07_select_input
  CSI_DATA07_SELECT_INPUT DAISY Register
• csi_data08_select_input
  CSI_DATA08_SELECT_INPUT DAISY Register
• csi_data09_select_input
  CSI_DATA09_SELECT_INPUT DAISY Register
• csi_hsync_select_input
  CSI_HSYNC_SELECT_INPUT DAISY Register
• csi_pixclk_select_input
  CSI_PIXCLK_SELECT_INPUT DAISY Register
• csi_vsync_select_input
  CSI_VSYNC_SELECT_INPUT DAISY Register
• enet0_rxdata_select_input
  ENET0_RXDATA_SELECT_INPUT DAISY Register
• enet0_timer_select_input
  ENET0_TIMER_SELECT_INPUT DAISY Register
• enet1_rxdata_select_input
  ENET1_RXDATA_SELECT_INPUT DAISY Register
• enet2_ipg_clk_rmii_select_input
  ENET2_IPG_CLK_RMII_SELECT_INPUT DAISY Register
• enet2_ipp_ind_mac0_mdio_select_input
  ENET2_IPP_IND_MAC0_MDIO_SELECT_INPUT DAISY Register
• enet2_ipp_ind_mac0_rxdata_select_input_0
  ENET2_IPP_IND_MAC0_RXDATA_SELECT_INPUT_0 DAISY Register
• enet2_ipp_ind_mac0_rxdata_select_input_1
  ENET2_IPP_IND_MAC0_RXDATA_SELECT_INPUT_1 DAISY Register
• enet2_ipp_ind_mac0_rxen_select_input
  ENET2_IPP_IND_MAC0_RXEN_SELECT_INPUT DAISY Register
• enet2_ipp_ind_mac0_rxerr_select_input
  ENET2_IPP_IND_MAC0_RXERR_SELECT_INPUT DAISY Register
• enet2_ipp_ind_mac0_timer_select_input_0
  ENET2_IPP_IND_MAC0_TIMER_SELECT_INPUT_0 DAISY Register
• enet2_ipp_ind_mac0_txclk_select_input
  ENET2_IPP_IND_MAC0_TXCLK_SELECT_INPUT DAISY Register
• enet_ipg_clk_rmii_select_input
  ENET_IPG_CLK_RMII_SELECT_INPUT DAISY Register
• enet_mdio_select_input
  ENET_MDIO_SELECT_INPUT DAISY Register
• enet_rxen_select_input
  ENET_RXEN_SELECT_INPUT DAISY Register
• enet_rxerr_select_input
  ENET_RXERR_SELECT_INPUT DAISY Register
• enet_txclk_select_input
  ENET_TXCLK_SELECT_INPUT DAISY Register
• flexcan1_rx_select_input
  FLEXCAN1_RX_SELECT_INPUT DAISY Register
• flexcan2_rx_select_input
  FLEXCAN2_RX_SELECT_INPUT DAISY Register
• flexpwm1_pwma0_select_input
  FLEXPWM1_PWMA0_SELECT_INPUT DAISY Register
• flexpwm1_pwma1_select_input
  FLEXPWM1_PWMA1_SELECT_INPUT DAISY Register
• flexpwm1_pwma2_select_input
  FLEXPWM1_PWMA2_SELECT_INPUT DAISY Register
• flexpwm1_pwma3_select_input
  FLEXPWM1_PWMA3_SELECT_INPUT DAISY Register
• flexpwm1_pwmb0_select_input
  FLEXPWM1_PWMB0_SELECT_INPUT DAISY Register
• flexpwm1_pwmb1_select_input
  FLEXPWM1_PWMB1_SELECT_INPUT DAISY Register
• flexpwm1_pwmb2_select_input
  FLEXPWM1_PWMB2_SELECT_INPUT DAISY Register
• flexpwm1_pwmb3_select_input
  FLEXPWM1_PWMB3_SELECT_INPUT DAISY Register
• flexpwm2_pwma0_select_input
  FLEXPWM2_PWMA0_SELECT_INPUT DAISY Register
• flexpwm2_pwma1_select_input
  FLEXPWM2_PWMA1_SELECT_INPUT DAISY Register
• flexpwm2_pwma2_select_input
  FLEXPWM2_PWMA2_SELECT_INPUT DAISY Register
• flexpwm2_pwma3_select_input
  FLEXPWM2_PWMA3_SELECT_INPUT DAISY Register
• flexpwm2_pwmb0_select_input
  FLEXPWM2_PWMB0_SELECT_INPUT DAISY Register
• flexpwm2_pwmb1_select_input
  FLEXPWM2_PWMB1_SELECT_INPUT DAISY Register
• flexpwm2_pwmb2_select_input
  FLEXPWM2_PWMB2_SELECT_INPUT DAISY Register
• flexpwm2_pwmb3_select_input
  FLEXPWM2_PWMB3_SELECT_INPUT DAISY Register
• flexpwm4_pwma0_select_input
  FLEXPWM4_PWMA0_SELECT_INPUT DAISY Register
• flexpwm4_pwma1_select_input
  FLEXPWM4_PWMA1_SELECT_INPUT DAISY Register
• flexpwm4_pwma2_select_input
  FLEXPWM4_PWMA2_SELECT_INPUT DAISY Register
• flexpwm4_pwma3_select_input
  FLEXPWM4_PWMA3_SELECT_INPUT DAISY Register
• flexspi2_ipp_ind_dqs_fa_select_input
  FLEXSPI2_IPP_IND_DQS_FA_SELECT_INPUT DAISY Register
• flexspi2_ipp_ind_io_fa_bit0_select_input
  FLEXSPI2_IPP_IND_IO_FA_BIT0_SELECT_INPUT DAISY Register
• flexspi2_ipp_ind_io_fa_bit1_select_input
  FLEXSPI2_IPP_IND_IO_FA_BIT1_SELECT_INPUT DAISY Register
• flexspi2_ipp_ind_io_fa_bit2_select_input
  FLEXSPI2_IPP_IND_IO_FA_BIT2_SELECT_INPUT DAISY Register
• flexspi2_ipp_ind_io_fa_bit3_select_input
  FLEXSPI2_IPP_IND_IO_FA_BIT3_SELECT_INPUT DAISY Register
• flexspi2_ipp_ind_io_fb_bit0_select_input
  FLEXSPI2_IPP_IND_IO_FB_BIT0_SELECT_INPUT DAISY Register
• flexspi2_ipp_ind_io_fb_bit1_select_input
  FLEXSPI2_IPP_IND_IO_FB_BIT1_SELECT_INPUT DAISY Register
• flexspi2_ipp_ind_io_fb_bit2_select_input
  FLEXSPI2_IPP_IND_IO_FB_BIT2_SELECT_INPUT DAISY Register
• flexspi2_ipp_ind_io_fb_bit3_select_input
  FLEXSPI2_IPP_IND_IO_FB_BIT3_SELECT_INPUT DAISY Register
• flexspi2_ipp_ind_sck_fa_select_input
  FLEXSPI2_IPP_IND_SCK_FA_SELECT_INPUT DAISY Register
• flexspi2_ipp_ind_sck_fb_select_input
  FLEXSPI2_IPP_IND_SCK_FB_SELECT_INPUT DAISY Register
• flexspia_data0_select_input
  FLEXSPIA_DATA0_SELECT_INPUT DAISY Register
• flexspia_data1_select_input
  FLEXSPIA_DATA1_SELECT_INPUT DAISY Register
• flexspia_data2_select_input
  FLEXSPIA_DATA2_SELECT_INPUT DAISY Register
• flexspia_data3_select_input
  FLEXSPIA_DATA3_SELECT_INPUT DAISY Register
• flexspia_dqs_select_input
  FLEXSPIA_DQS_SELECT_INPUT DAISY Register
• flexspia_sck_select_input
  FLEXSPIA_SCK_SELECT_INPUT DAISY Register
• flexspib_data0_select_input
  FLEXSPIB_DATA0_SELECT_INPUT DAISY Register
• flexspib_data1_select_input
  FLEXSPIB_DATA1_SELECT_INPUT DAISY Register
• flexspib_data2_select_input
  FLEXSPIB_DATA2_SELECT_INPUT DAISY Register
• flexspib_data3_select_input
  FLEXSPIB_DATA3_SELECT_INPUT DAISY Register
• gpt1_ipp_ind_capin1_select_input
  GPT1_IPP_IND_CAPIN1_SELECT_INPUT DAISY Register
• gpt1_ipp_ind_capin2_select_input
  GPT1_IPP_IND_CAPIN2_SELECT_INPUT DAISY Register
• gpt1_ipp_ind_clkin_select_input
  GPT1_IPP_IND_CLKIN_SELECT_INPUT DAISY Register
• gpt2_ipp_ind_capin1_select_input
  GPT2_IPP_IND_CAPIN1_SELECT_INPUT DAISY Register
• gpt2_ipp_ind_capin2_select_input
  GPT2_IPP_IND_CAPIN2_SELECT_INPUT DAISY Register
• gpt2_ipp_ind_clkin_select_input
  GPT2_IPP_IND_CLKIN_SELECT_INPUT DAISY Register
• lpi2c1_scl_select_input
  LPI2C1_SCL_SELECT_INPUT DAISY Register
• lpi2c1_sda_select_input
  LPI2C1_SDA_SELECT_INPUT DAISY Register
• lpi2c2_scl_select_input
  LPI2C2_SCL_SELECT_INPUT DAISY Register
• lpi2c2_sda_select_input
  LPI2C2_SDA_SELECT_INPUT DAISY Register
• lpi2c3_scl_select_input
  LPI2C3_SCL_SELECT_INPUT DAISY Register
• lpi2c3_sda_select_input
  LPI2C3_SDA_SELECT_INPUT DAISY Register
• lpi2c4_scl_select_input
  LPI2C4_SCL_SELECT_INPUT DAISY Register
• lpi2c4_sda_select_input
  LPI2C4_SDA_SELECT_INPUT DAISY Register
• lpspi1_pcs0_select_input
  LPSPI1_PCS0_SELECT_INPUT DAISY Register
• lpspi1_sck_select_input
  LPSPI1_SCK_SELECT_INPUT DAISY Register
• lpspi1_sdi_select_input
  LPSPI1_SDI_SELECT_INPUT DAISY Register
• lpspi1_sdo_select_input
  LPSPI1_SDO_SELECT_INPUT DAISY Register
• lpspi2_pcs0_select_input
  LPSPI2_PCS0_SELECT_INPUT DAISY Register
• lpspi2_sck_select_input
  LPSPI2_SCK_SELECT_INPUT DAISY Register
• lpspi2_sdi_select_input
  LPSPI2_SDI_SELECT_INPUT DAISY Register
• lpspi2_sdo_select_input
  LPSPI2_SDO_SELECT_INPUT DAISY Register
• lpspi3_pcs0_select_input
  LPSPI3_PCS0_SELECT_INPUT DAISY Register
• lpspi3_sck_select_input
  LPSPI3_SCK_SELECT_INPUT DAISY Register
• lpspi3_sdi_select_input
  LPSPI3_SDI_SELECT_INPUT DAISY Register
• lpspi3_sdo_select_input
  LPSPI3_SDO_SELECT_INPUT DAISY Register
• lpspi4_pcs0_select_input
  LPSPI4_PCS0_SELECT_INPUT DAISY Register
• lpspi4_sck_select_input
  LPSPI4_SCK_SELECT_INPUT DAISY Register
• lpspi4_sdi_select_input
  LPSPI4_SDI_SELECT_INPUT DAISY Register
• lpspi4_sdo_select_input
  LPSPI4_SDO_SELECT_INPUT DAISY Register
• lpuart2_rx_select_input
  LPUART2_RX_SELECT_INPUT DAISY Register
• lpuart2_tx_select_input
  LPUART2_TX_SELECT_INPUT DAISY Register
• lpuart3_cts_b_select_input
  LPUART3_CTS_B_SELECT_INPUT DAISY Register
• lpuart3_rx_select_input
  LPUART3_RX_SELECT_INPUT DAISY Register
• lpuart3_tx_select_input
  LPUART3_TX_SELECT_INPUT DAISY Register
• lpuart4_rx_select_input
  LPUART4_RX_SELECT_INPUT DAISY Register
• lpuart4_tx_select_input
  LPUART4_TX_SELECT_INPUT DAISY Register
• lpuart5_rx_select_input
  LPUART5_RX_SELECT_INPUT DAISY Register
• lpuart5_tx_select_input
  LPUART5_TX_SELECT_INPUT DAISY Register
• lpuart6_rx_select_input
  LPUART6_RX_SELECT_INPUT DAISY Register
• lpuart6_tx_select_input
  LPUART6_TX_SELECT_INPUT DAISY Register
• lpuart7_rx_select_input
  LPUART7_RX_SELECT_INPUT DAISY Register
• lpuart7_tx_select_input
  LPUART7_TX_SELECT_INPUT DAISY Register
• lpuart8_rx_select_input
  LPUART8_RX_SELECT_INPUT DAISY Register
• lpuart8_tx_select_input
  LPUART8_TX_SELECT_INPUT DAISY Register
• nmi_select_input
  NMI_GLUE_NMI_SELECT_INPUT DAISY Register
• qtimer2_timer0_select_input
  QTIMER2_TIMER0_SELECT_INPUT DAISY Register
• qtimer2_timer1_select_input
  QTIMER2_TIMER1_SELECT_INPUT DAISY Register
• qtimer2_timer2_select_input
  QTIMER2_TIMER2_SELECT_INPUT DAISY Register
• qtimer2_timer3_select_input
  QTIMER2_TIMER3_SELECT_INPUT DAISY Register
• qtimer3_timer0_select_input
  QTIMER3_TIMER0_SELECT_INPUT DAISY Register
• qtimer3_timer1_select_input
  QTIMER3_TIMER1_SELECT_INPUT DAISY Register
• qtimer3_timer2_select_input
  QTIMER3_TIMER2_SELECT_INPUT DAISY Register
• qtimer3_timer3_select_input
  QTIMER3_TIMER3_SELECT_INPUT DAISY Register
• sai1_mclk2_select_input
  SAI1_MCLK2_SELECT_INPUT DAISY Register
• sai1_rx_bclk_select_input
  SAI1_RX_BCLK_SELECT_INPUT DAISY Register
• sai1_rx_data0_select_input
  SAI1_RX_DATA0_SELECT_INPUT DAISY Register
• sai1_rx_data1_select_input
  SAI1_RX_DATA1_SELECT_INPUT DAISY Register
• sai1_rx_data2_select_input
  SAI1_RX_DATA2_SELECT_INPUT DAISY Register
• sai1_rx_data3_select_input
  SAI1_RX_DATA3_SELECT_INPUT DAISY Register
• sai1_rx_sync_select_input
  SAI1_RX_SYNC_SELECT_INPUT DAISY Register
• sai1_tx_bclk_select_input
  SAI1_TX_BCLK_SELECT_INPUT DAISY Register
• sai1_tx_sync_select_input
  SAI1_TX_SYNC_SELECT_INPUT DAISY Register
• sai2_mclk2_select_input
  SAI2_MCLK2_SELECT_INPUT DAISY Register
• sai2_rx_bclk_select_input
  SAI2_RX_BCLK_SELECT_INPUT DAISY Register
• sai2_rx_data0_select_input
  SAI2_RX_DATA0_SELECT_INPUT DAISY Register
• sai2_rx_sync_select_input
  SAI2_RX_SYNC_SELECT_INPUT DAISY Register
• sai2_tx_bclk_select_input
  SAI2_TX_BCLK_SELECT_INPUT DAISY Register
• sai2_tx_sync_select_input
  SAI2_TX_SYNC_SELECT_INPUT DAISY Register
• sai3_ipg_clk_sai_mclk_select_input_2
  SAI3_IPG_CLK_SAI_MCLK_SELECT_INPUT_2 DAISY Register
• sai3_ipp_ind_sai_rxbclk_select_input
  SAI3_IPP_IND_SAI_RXBCLK_SELECT_INPUT DAISY Register
• sai3_ipp_ind_sai_rxdata_select_input_0
  SAI3_IPP_IND_SAI_RXDATA_SELECT_INPUT_0 DAISY Register
• sai3_ipp_ind_sai_rxsync_select_input
  SAI3_IPP_IND_SAI_RXSYNC_SELECT_INPUT DAISY Register
• sai3_ipp_ind_sai_txbclk_select_input
  SAI3_IPP_IND_SAI_TXBCLK_SELECT_INPUT DAISY Register
• sai3_ipp_ind_sai_txsync_select_input
  SAI3_IPP_IND_SAI_TXSYNC_SELECT_INPUT DAISY Register
• semc_i_ipp_ind_dqs4_select_input
  SEMC_I_IPP_IND_DQS4_SELECT_INPUT DAISY Register
• spdif_in_select_input
  SPDIF_IN_SELECT_INPUT DAISY Register
• sw_mux_ctl_pad_gpio_ad_b0_00
  SW_MUX_CTL_PAD_GPIO_AD_B0_00 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b0_01
  SW_MUX_CTL_PAD_GPIO_AD_B0_01 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b0_02
  SW_MUX_CTL_PAD_GPIO_AD_B0_02 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b0_03
  SW_MUX_CTL_PAD_GPIO_AD_B0_03 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b0_04
  SW_MUX_CTL_PAD_GPIO_AD_B0_04 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b0_05
  SW_MUX_CTL_PAD_GPIO_AD_B0_05 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b0_06
  SW_MUX_CTL_PAD_GPIO_AD_B0_06 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b0_07
  SW_MUX_CTL_PAD_GPIO_AD_B0_07 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b0_08
  SW_MUX_CTL_PAD_GPIO_AD_B0_08 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b0_09
  SW_MUX_CTL_PAD_GPIO_AD_B0_09 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b0_10
  SW_MUX_CTL_PAD_GPIO_AD_B0_10 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b0_11
  SW_MUX_CTL_PAD_GPIO_AD_B0_11 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b0_12
  SW_MUX_CTL_PAD_GPIO_AD_B0_12 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b0_13
  SW_MUX_CTL_PAD_GPIO_AD_B0_13 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b0_14
  SW_MUX_CTL_PAD_GPIO_AD_B0_14 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b0_15
  SW_MUX_CTL_PAD_GPIO_AD_B0_15 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b1_00
  SW_MUX_CTL_PAD_GPIO_AD_B1_00 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b1_01
  SW_MUX_CTL_PAD_GPIO_AD_B1_01 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b1_02
  SW_MUX_CTL_PAD_GPIO_AD_B1_02 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b1_03
  SW_MUX_CTL_PAD_GPIO_AD_B1_03 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b1_04
  SW_MUX_CTL_PAD_GPIO_AD_B1_04 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b1_05
  SW_MUX_CTL_PAD_GPIO_AD_B1_05 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b1_06
  SW_MUX_CTL_PAD_GPIO_AD_B1_06 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b1_07
  SW_MUX_CTL_PAD_GPIO_AD_B1_07 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b1_08
  SW_MUX_CTL_PAD_GPIO_AD_B1_08 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b1_09
  SW_MUX_CTL_PAD_GPIO_AD_B1_09 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b1_10
  SW_MUX_CTL_PAD_GPIO_AD_B1_10 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b1_11
  SW_MUX_CTL_PAD_GPIO_AD_B1_11 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b1_12
  SW_MUX_CTL_PAD_GPIO_AD_B1_12 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b1_13
  SW_MUX_CTL_PAD_GPIO_AD_B1_13 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b1_14
  SW_MUX_CTL_PAD_GPIO_AD_B1_14 SW MUX Control Register
• sw_mux_ctl_pad_gpio_ad_b1_15
  SW_MUX_CTL_PAD_GPIO_AD_B1_15 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b0_00
  SW_MUX_CTL_PAD_GPIO_B0_00 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b0_01
  SW_MUX_CTL_PAD_GPIO_B0_01 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b0_02
  SW_MUX_CTL_PAD_GPIO_B0_02 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b0_03
  SW_MUX_CTL_PAD_GPIO_B0_03 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b0_04
  SW_MUX_CTL_PAD_GPIO_B0_04 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b0_05
  SW_MUX_CTL_PAD_GPIO_B0_05 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b0_06
  SW_MUX_CTL_PAD_GPIO_B0_06 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b0_07
  SW_MUX_CTL_PAD_GPIO_B0_07 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b0_08
  SW_MUX_CTL_PAD_GPIO_B0_08 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b0_09
  SW_MUX_CTL_PAD_GPIO_B0_09 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b0_10
  SW_MUX_CTL_PAD_GPIO_B0_10 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b0_11
  SW_MUX_CTL_PAD_GPIO_B0_11 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b0_12
  SW_MUX_CTL_PAD_GPIO_B0_12 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b0_13
  SW_MUX_CTL_PAD_GPIO_B0_13 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b0_14
  SW_MUX_CTL_PAD_GPIO_B0_14 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b0_15
  SW_MUX_CTL_PAD_GPIO_B0_15 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b1_00
  SW_MUX_CTL_PAD_GPIO_B1_00 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b1_01
  SW_MUX_CTL_PAD_GPIO_B1_01 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b1_02
  SW_MUX_CTL_PAD_GPIO_B1_02 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b1_03
  SW_MUX_CTL_PAD_GPIO_B1_03 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b1_04
  SW_MUX_CTL_PAD_GPIO_B1_04 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b1_05
  SW_MUX_CTL_PAD_GPIO_B1_05 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b1_06
  SW_MUX_CTL_PAD_GPIO_B1_06 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b1_07
  SW_MUX_CTL_PAD_GPIO_B1_07 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b1_08
  SW_MUX_CTL_PAD_GPIO_B1_08 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b1_09
  SW_MUX_CTL_PAD_GPIO_B1_09 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b1_10
  SW_MUX_CTL_PAD_GPIO_B1_10 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b1_11
  SW_MUX_CTL_PAD_GPIO_B1_11 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b1_12
  SW_MUX_CTL_PAD_GPIO_B1_12 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b1_13
  SW_MUX_CTL_PAD_GPIO_B1_13 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b1_14
  SW_MUX_CTL_PAD_GPIO_B1_14 SW MUX Control Register
• sw_mux_ctl_pad_gpio_b1_15
  SW_MUX_CTL_PAD_GPIO_B1_15 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_00
  SW_MUX_CTL_PAD_GPIO_EMC_00 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_01
  SW_MUX_CTL_PAD_GPIO_EMC_01 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_02
  SW_MUX_CTL_PAD_GPIO_EMC_02 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_03
  SW_MUX_CTL_PAD_GPIO_EMC_03 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_04
  SW_MUX_CTL_PAD_GPIO_EMC_04 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_05
  SW_MUX_CTL_PAD_GPIO_EMC_05 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_06
  SW_MUX_CTL_PAD_GPIO_EMC_06 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_07
  SW_MUX_CTL_PAD_GPIO_EMC_07 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_08
  SW_MUX_CTL_PAD_GPIO_EMC_08 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_09
  SW_MUX_CTL_PAD_GPIO_EMC_09 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_10
  SW_MUX_CTL_PAD_GPIO_EMC_10 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_11
  SW_MUX_CTL_PAD_GPIO_EMC_11 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_12
  SW_MUX_CTL_PAD_GPIO_EMC_12 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_13
  SW_MUX_CTL_PAD_GPIO_EMC_13 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_14
  SW_MUX_CTL_PAD_GPIO_EMC_14 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_15
  SW_MUX_CTL_PAD_GPIO_EMC_15 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_16
  SW_MUX_CTL_PAD_GPIO_EMC_16 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_17
  SW_MUX_CTL_PAD_GPIO_EMC_17 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_18
  SW_MUX_CTL_PAD_GPIO_EMC_18 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_19
  SW_MUX_CTL_PAD_GPIO_EMC_19 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_20
  SW_MUX_CTL_PAD_GPIO_EMC_20 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_21
  SW_MUX_CTL_PAD_GPIO_EMC_21 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_22
  SW_MUX_CTL_PAD_GPIO_EMC_22 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_23
  SW_MUX_CTL_PAD_GPIO_EMC_23 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_24
  SW_MUX_CTL_PAD_GPIO_EMC_24 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_25
  SW_MUX_CTL_PAD_GPIO_EMC_25 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_26
  SW_MUX_CTL_PAD_GPIO_EMC_26 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_27
  SW_MUX_CTL_PAD_GPIO_EMC_27 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_28
  SW_MUX_CTL_PAD_GPIO_EMC_28 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_29
  SW_MUX_CTL_PAD_GPIO_EMC_29 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_30
  SW_MUX_CTL_PAD_GPIO_EMC_30 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_31
  SW_MUX_CTL_PAD_GPIO_EMC_31 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_32
  SW_MUX_CTL_PAD_GPIO_EMC_32 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_33
  SW_MUX_CTL_PAD_GPIO_EMC_33 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_34
  SW_MUX_CTL_PAD_GPIO_EMC_34 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_35
  SW_MUX_CTL_PAD_GPIO_EMC_35 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_36
  SW_MUX_CTL_PAD_GPIO_EMC_36 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_37
  SW_MUX_CTL_PAD_GPIO_EMC_37 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_38
  SW_MUX_CTL_PAD_GPIO_EMC_38 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_39
  SW_MUX_CTL_PAD_GPIO_EMC_39 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_40
  SW_MUX_CTL_PAD_GPIO_EMC_40 SW MUX Control Register
• sw_mux_ctl_pad_gpio_emc_41
  SW_MUX_CTL_PAD_GPIO_EMC_41 SW MUX Control Register
• sw_mux_ctl_pad_gpio_sd_b0_00
  SW_MUX_CTL_PAD_GPIO_SD_B0_00 SW MUX Control Register
• sw_mux_ctl_pad_gpio_sd_b0_01
  SW_MUX_CTL_PAD_GPIO_SD_B0_01 SW MUX Control Register
• sw_mux_ctl_pad_gpio_sd_b0_02
  SW_MUX_CTL_PAD_GPIO_SD_B0_02 SW MUX Control Register
• sw_mux_ctl_pad_gpio_sd_b0_03
  SW_MUX_CTL_PAD_GPIO_SD_B0_03 SW MUX Control Register
• sw_mux_ctl_pad_gpio_sd_b0_04
  SW_MUX_CTL_PAD_GPIO_SD_B0_04 SW MUX Control Register
• sw_mux_ctl_pad_gpio_sd_b0_05
  SW_MUX_CTL_PAD_GPIO_SD_B0_05 SW MUX Control Register
• sw_mux_ctl_pad_gpio_sd_b1_00
  SW_MUX_CTL_PAD_GPIO_SD_B1_00 SW MUX Control Register
• sw_mux_ctl_pad_gpio_sd_b1_01
  SW_MUX_CTL_PAD_GPIO_SD_B1_01 SW MUX Control Register
• sw_mux_ctl_pad_gpio_sd_b1_02
  SW_MUX_CTL_PAD_GPIO_SD_B1_02 SW MUX Control Register
• sw_mux_ctl_pad_gpio_sd_b1_03
  SW_MUX_CTL_PAD_GPIO_SD_B1_03 SW MUX Control Register
• sw_mux_ctl_pad_gpio_sd_b1_04
  SW_MUX_CTL_PAD_GPIO_SD_B1_04 SW MUX Control Register
• sw_mux_ctl_pad_gpio_sd_b1_05
  SW_MUX_CTL_PAD_GPIO_SD_B1_05 SW MUX Control Register
• sw_mux_ctl_pad_gpio_sd_b1_06
  SW_MUX_CTL_PAD_GPIO_SD_B1_06 SW MUX Control Register
• sw_mux_ctl_pad_gpio_sd_b1_07
  SW_MUX_CTL_PAD_GPIO_SD_B1_07 SW MUX Control Register
• sw_mux_ctl_pad_gpio_sd_b1_08
  SW_MUX_CTL_PAD_GPIO_SD_B1_08 SW MUX Control Register
• sw_mux_ctl_pad_gpio_sd_b1_09
  SW_MUX_CTL_PAD_GPIO_SD_B1_09 SW MUX Control Register
• sw_mux_ctl_pad_gpio_sd_b1_10
  SW_MUX_CTL_PAD_GPIO_SD_B1_10 SW MUX Control Register
• sw_mux_ctl_pad_gpio_sd_b1_11
  SW_MUX_CTL_PAD_GPIO_SD_B1_11 SW MUX Control Register
• sw_mux_ctl_pad_gpio_spi_b0_00
  SW_MUX_CTL_PAD_GPIO_SPI_B0_00 SW MUX Control Register
• sw_mux_ctl_pad_gpio_spi_b0_01
  SW_MUX_CTL_PAD_GPIO_SPI_B0_01 SW MUX Control Register
• sw_mux_ctl_pad_gpio_spi_b0_02
  SW_MUX_CTL_PAD_GPIO_SPI_B0_02 SW MUX Control Register
• sw_mux_ctl_pad_gpio_spi_b0_03
  SW_MUX_CTL_PAD_GPIO_SPI_B0_03 SW MUX Control Register
• sw_mux_ctl_pad_gpio_spi_b0_04
  SW_MUX_CTL_PAD_GPIO_SPI_B0_04 SW MUX Control Register
• sw_mux_ctl_pad_gpio_spi_b0_05
  SW_MUX_CTL_PAD_GPIO_SPI_B0_05 SW MUX Control Register
• sw_mux_ctl_pad_gpio_spi_b0_06
  SW_MUX_CTL_PAD_GPIO_SPI_B0_06 SW MUX Control Register
• sw_mux_ctl_pad_gpio_spi_b0_07
  SW_MUX_CTL_PAD_GPIO_SPI_B0_07 SW MUX Control Register
• sw_mux_ctl_pad_gpio_spi_b0_08
  SW_MUX_CTL_PAD_GPIO_SPI_B0_08 SW MUX Control Register
• sw_mux_ctl_pad_gpio_spi_b0_09
  SW_MUX_CTL_PAD_GPIO_SPI_B0_09 SW MUX Control Register
• sw_mux_ctl_pad_gpio_spi_b0_10
  SW_MUX_CTL_PAD_GPIO_SPI_B0_10 SW MUX Control Register
• sw_mux_ctl_pad_gpio_spi_b0_11
  SW_MUX_CTL_PAD_GPIO_SPI_B0_11 SW MUX Control Register
• sw_mux_ctl_pad_gpio_spi_b0_12
  SW_MUX_CTL_PAD_GPIO_SPI_B0_12 SW MUX Control Register
• sw_mux_ctl_pad_gpio_spi_b0_13
  SW_MUX_CTL_PAD_GPIO_SPI_B0_13 SW MUX Control Register
• sw_mux_ctl_pad_gpio_spi_b1_00
  SW_MUX_CTL_PAD_GPIO_SPI_B1_00 SW MUX Control Register
• sw_mux_ctl_pad_gpio_spi_b1_01
  SW_MUX_CTL_PAD_GPIO_SPI_B1_01 SW MUX Control Register
• sw_mux_ctl_pad_gpio_spi_b1_02
  SW_MUX_CTL_PAD_GPIO_SPI_B1_02 SW MUX Control Register
• sw_mux_ctl_pad_gpio_spi_b1_03
  SW_MUX_CTL_PAD_GPIO_SPI_B1_03 SW MUX Control Register
• sw_mux_ctl_pad_gpio_spi_b1_04
  SW_MUX_CTL_PAD_GPIO_SPI_B1_04 SW MUX Control Register
• sw_mux_ctl_pad_gpio_spi_b1_05
  SW_MUX_CTL_PAD_GPIO_SPI_B1_05 SW MUX Control Register
• sw_mux_ctl_pad_gpio_spi_b1_06
  SW_MUX_CTL_PAD_GPIO_SPI_B1_06 SW MUX Control Register
• sw_mux_ctl_pad_gpio_spi_b1_07
  SW_MUX_CTL_PAD_GPIO_SPI_B1_07 SW MUX Control Register
• sw_pad_ctl_pad_gpio_ad_b0_00
  SW_PAD_CTL_PAD_GPIO_AD_B0_00 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b0_01
  SW_PAD_CTL_PAD_GPIO_AD_B0_01 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b0_02
  SW_PAD_CTL_PAD_GPIO_AD_B0_02 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b0_03
  SW_PAD_CTL_PAD_GPIO_AD_B0_03 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b0_04
  SW_PAD_CTL_PAD_GPIO_AD_B0_04 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b0_05
  SW_PAD_CTL_PAD_GPIO_AD_B0_05 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b0_06
  SW_PAD_CTL_PAD_GPIO_AD_B0_06 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b0_07
  SW_PAD_CTL_PAD_GPIO_AD_B0_07 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b0_08
  SW_PAD_CTL_PAD_GPIO_AD_B0_08 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b0_09
  SW_PAD_CTL_PAD_GPIO_AD_B0_09 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b0_10
  SW_PAD_CTL_PAD_GPIO_AD_B0_10 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b0_11
  SW_PAD_CTL_PAD_GPIO_AD_B0_11 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b0_12
  SW_PAD_CTL_PAD_GPIO_AD_B0_12 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b0_13
  SW_PAD_CTL_PAD_GPIO_AD_B0_13 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b0_14
  SW_PAD_CTL_PAD_GPIO_AD_B0_14 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b0_15
  SW_PAD_CTL_PAD_GPIO_AD_B0_15 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b1_00
  SW_PAD_CTL_PAD_GPIO_AD_B1_00 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b1_01
  SW_PAD_CTL_PAD_GPIO_AD_B1_01 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b1_02
  SW_PAD_CTL_PAD_GPIO_AD_B1_02 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b1_03
  SW_PAD_CTL_PAD_GPIO_AD_B1_03 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b1_04
  SW_PAD_CTL_PAD_GPIO_AD_B1_04 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b1_05
  SW_PAD_CTL_PAD_GPIO_AD_B1_05 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b1_06
  SW_PAD_CTL_PAD_GPIO_AD_B1_06 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b1_07
  SW_PAD_CTL_PAD_GPIO_AD_B1_07 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b1_08
  SW_PAD_CTL_PAD_GPIO_AD_B1_08 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b1_09
  SW_PAD_CTL_PAD_GPIO_AD_B1_09 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b1_10
  SW_PAD_CTL_PAD_GPIO_AD_B1_10 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b1_11
  SW_PAD_CTL_PAD_GPIO_AD_B1_11 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b1_12
  SW_PAD_CTL_PAD_GPIO_AD_B1_12 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b1_13
  SW_PAD_CTL_PAD_GPIO_AD_B1_13 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b1_14
  SW_PAD_CTL_PAD_GPIO_AD_B1_14 SW PAD Control Register
• sw_pad_ctl_pad_gpio_ad_b1_15
  SW_PAD_CTL_PAD_GPIO_AD_B1_15 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b0_00
  SW_PAD_CTL_PAD_GPIO_B0_00 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b0_01
  SW_PAD_CTL_PAD_GPIO_B0_01 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b0_02
  SW_PAD_CTL_PAD_GPIO_B0_02 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b0_03
  SW_PAD_CTL_PAD_GPIO_B0_03 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b0_04
  SW_PAD_CTL_PAD_GPIO_B0_04 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b0_05
  SW_PAD_CTL_PAD_GPIO_B0_05 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b0_06
  SW_PAD_CTL_PAD_GPIO_B0_06 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b0_07
  SW_PAD_CTL_PAD_GPIO_B0_07 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b0_08
  SW_PAD_CTL_PAD_GPIO_B0_08 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b0_09
  SW_PAD_CTL_PAD_GPIO_B0_09 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b0_10
  SW_PAD_CTL_PAD_GPIO_B0_10 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b0_11
  SW_PAD_CTL_PAD_GPIO_B0_11 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b0_12
  SW_PAD_CTL_PAD_GPIO_B0_12 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b0_13
  SW_PAD_CTL_PAD_GPIO_B0_13 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b0_14
  SW_PAD_CTL_PAD_GPIO_B0_14 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b0_15
  SW_PAD_CTL_PAD_GPIO_B0_15 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b1_00
  SW_PAD_CTL_PAD_GPIO_B1_00 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b1_01
  SW_PAD_CTL_PAD_GPIO_B1_01 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b1_02
  SW_PAD_CTL_PAD_GPIO_B1_02 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b1_03
  SW_PAD_CTL_PAD_GPIO_B1_03 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b1_04
  SW_PAD_CTL_PAD_GPIO_B1_04 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b1_05
  SW_PAD_CTL_PAD_GPIO_B1_05 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b1_06
  SW_PAD_CTL_PAD_GPIO_B1_06 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b1_07
  SW_PAD_CTL_PAD_GPIO_B1_07 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b1_08
  SW_PAD_CTL_PAD_GPIO_B1_08 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b1_09
  SW_PAD_CTL_PAD_GPIO_B1_09 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b1_10
  SW_PAD_CTL_PAD_GPIO_B1_10 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b1_11
  SW_PAD_CTL_PAD_GPIO_B1_11 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b1_12
  SW_PAD_CTL_PAD_GPIO_B1_12 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b1_13
  SW_PAD_CTL_PAD_GPIO_B1_13 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b1_14
  SW_PAD_CTL_PAD_GPIO_B1_14 SW PAD Control Register
• sw_pad_ctl_pad_gpio_b1_15
  SW_PAD_CTL_PAD_GPIO_B1_15 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_00
  SW_PAD_CTL_PAD_GPIO_EMC_00 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_01
  SW_PAD_CTL_PAD_GPIO_EMC_01 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_02
  SW_PAD_CTL_PAD_GPIO_EMC_02 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_03
  SW_PAD_CTL_PAD_GPIO_EMC_03 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_04
  SW_PAD_CTL_PAD_GPIO_EMC_04 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_05
  SW_PAD_CTL_PAD_GPIO_EMC_05 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_06
  SW_PAD_CTL_PAD_GPIO_EMC_06 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_07
  SW_PAD_CTL_PAD_GPIO_EMC_07 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_08
  SW_PAD_CTL_PAD_GPIO_EMC_08 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_09
  SW_PAD_CTL_PAD_GPIO_EMC_09 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_10
  SW_PAD_CTL_PAD_GPIO_EMC_10 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_11
  SW_PAD_CTL_PAD_GPIO_EMC_11 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_12
  SW_PAD_CTL_PAD_GPIO_EMC_12 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_13
  SW_PAD_CTL_PAD_GPIO_EMC_13 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_14
  SW_PAD_CTL_PAD_GPIO_EMC_14 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_15
  SW_PAD_CTL_PAD_GPIO_EMC_15 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_16
  SW_PAD_CTL_PAD_GPIO_EMC_16 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_17
  SW_PAD_CTL_PAD_GPIO_EMC_17 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_18
  SW_PAD_CTL_PAD_GPIO_EMC_18 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_19
  SW_PAD_CTL_PAD_GPIO_EMC_19 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_20
  SW_PAD_CTL_PAD_GPIO_EMC_20 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_21
  SW_PAD_CTL_PAD_GPIO_EMC_21 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_22
  SW_PAD_CTL_PAD_GPIO_EMC_22 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_23
  SW_PAD_CTL_PAD_GPIO_EMC_23 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_24
  SW_PAD_CTL_PAD_GPIO_EMC_24 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_25
  SW_PAD_CTL_PAD_GPIO_EMC_25 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_26
  SW_PAD_CTL_PAD_GPIO_EMC_26 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_27
  SW_PAD_CTL_PAD_GPIO_EMC_27 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_28
  SW_PAD_CTL_PAD_GPIO_EMC_28 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_29
  SW_PAD_CTL_PAD_GPIO_EMC_29 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_30
  SW_PAD_CTL_PAD_GPIO_EMC_30 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_31
  SW_PAD_CTL_PAD_GPIO_EMC_31 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_32
  SW_PAD_CTL_PAD_GPIO_EMC_32 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_33
  SW_PAD_CTL_PAD_GPIO_EMC_33 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_34
  SW_PAD_CTL_PAD_GPIO_EMC_34 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_35
  SW_PAD_CTL_PAD_GPIO_EMC_35 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_36
  SW_PAD_CTL_PAD_GPIO_EMC_36 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_37
  SW_PAD_CTL_PAD_GPIO_EMC_37 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_38
  SW_PAD_CTL_PAD_GPIO_EMC_38 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_39
  SW_PAD_CTL_PAD_GPIO_EMC_39 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_40
  SW_PAD_CTL_PAD_GPIO_EMC_40 SW PAD Control Register
• sw_pad_ctl_pad_gpio_emc_41
  SW_PAD_CTL_PAD_GPIO_EMC_41 SW PAD Control Register
• sw_pad_ctl_pad_gpio_sd_b0_00
  SW_PAD_CTL_PAD_GPIO_SD_B0_00 SW PAD Control Register
• sw_pad_ctl_pad_gpio_sd_b0_01
  SW_PAD_CTL_PAD_GPIO_SD_B0_01 SW PAD Control Register
• sw_pad_ctl_pad_gpio_sd_b0_02
  SW_PAD_CTL_PAD_GPIO_SD_B0_02 SW PAD Control Register
• sw_pad_ctl_pad_gpio_sd_b0_03
  SW_PAD_CTL_PAD_GPIO_SD_B0_03 SW PAD Control Register
• sw_pad_ctl_pad_gpio_sd_b0_04
  SW_PAD_CTL_PAD_GPIO_SD_B0_04 SW PAD Control Register
• sw_pad_ctl_pad_gpio_sd_b0_05
  SW_PAD_CTL_PAD_GPIO_SD_B0_05 SW PAD Control Register
• sw_pad_ctl_pad_gpio_sd_b1_00
  SW_PAD_CTL_PAD_GPIO_SD_B1_00 SW PAD Control Register
• sw_pad_ctl_pad_gpio_sd_b1_01
  SW_PAD_CTL_PAD_GPIO_SD_B1_01 SW PAD Control Register
• sw_pad_ctl_pad_gpio_sd_b1_02
  SW_PAD_CTL_PAD_GPIO_SD_B1_02 SW PAD Control Register
• sw_pad_ctl_pad_gpio_sd_b1_03
  SW_PAD_CTL_PAD_GPIO_SD_B1_03 SW PAD Control Register
• sw_pad_ctl_pad_gpio_sd_b1_04
  SW_PAD_CTL_PAD_GPIO_SD_B1_04 SW PAD Control Register
• sw_pad_ctl_pad_gpio_sd_b1_05
  SW_PAD_CTL_PAD_GPIO_SD_B1_05 SW PAD Control Register
• sw_pad_ctl_pad_gpio_sd_b1_06
  SW_PAD_CTL_PAD_GPIO_SD_B1_06 SW PAD Control Register
• sw_pad_ctl_pad_gpio_sd_b1_07
  SW_PAD_CTL_PAD_GPIO_SD_B1_07 SW PAD Control Register
• sw_pad_ctl_pad_gpio_sd_b1_08
  SW_PAD_CTL_PAD_GPIO_SD_B1_08 SW PAD Control Register
• sw_pad_ctl_pad_gpio_sd_b1_09
  SW_PAD_CTL_PAD_GPIO_SD_B1_09 SW PAD Control Register
• sw_pad_ctl_pad_gpio_sd_b1_10
  SW_PAD_CTL_PAD_GPIO_SD_B1_10 SW PAD Control Register
• sw_pad_ctl_pad_gpio_sd_b1_11
  SW_PAD_CTL_PAD_GPIO_SD_B1_11 SW PAD Control Register
• sw_pad_ctl_pad_gpio_spi_b0_00
  SW_PAD_CTL_PAD_GPIO_SPI_B0_00 SW PAD Control Register
• sw_pad_ctl_pad_gpio_spi_b0_01
  SW_PAD_CTL_PAD_GPIO_SPI_B0_01 SW PAD Control Register
• sw_pad_ctl_pad_gpio_spi_b0_02
  SW_PAD_CTL_PAD_GPIO_SPI_B0_02 SW PAD Control Register
• sw_pad_ctl_pad_gpio_spi_b0_03
  SW_PAD_CTL_PAD_GPIO_SPI_B0_03 SW PAD Control Register
• sw_pad_ctl_pad_gpio_spi_b0_04
  SW_PAD_CTL_PAD_GPIO_SPI_B0_04 SW PAD Control Register
• sw_pad_ctl_pad_gpio_spi_b0_05
  SW_PAD_CTL_PAD_GPIO_SPI_B0_05 SW PAD Control Register
• sw_pad_ctl_pad_gpio_spi_b0_06
  SW_PAD_CTL_PAD_GPIO_SPI_B0_06 SW PAD Control Register
• sw_pad_ctl_pad_gpio_spi_b0_07
  SW_PAD_CTL_PAD_GPIO_SPI_B0_07 SW PAD Control Register
• sw_pad_ctl_pad_gpio_spi_b0_08
  SW_PAD_CTL_PAD_GPIO_SPI_B0_08 SW PAD Control Register
• sw_pad_ctl_pad_gpio_spi_b0_09
  SW_PAD_CTL_PAD_GPIO_SPI_B0_09 SW PAD Control Register
• sw_pad_ctl_pad_gpio_spi_b0_10
  SW_PAD_CTL_PAD_GPIO_SPI_B0_10 SW PAD Control Register
• sw_pad_ctl_pad_gpio_spi_b0_11
  SW_PAD_CTL_PAD_GPIO_SPI_B0_11 SW PAD Control Register
• sw_pad_ctl_pad_gpio_spi_b0_12
  SW_PAD_CTL_PAD_GPIO_SPI_B0_12 SW PAD Control Register
• sw_pad_ctl_pad_gpio_spi_b0_13
  SW_PAD_CTL_PAD_GPIO_SPI_B0_13 SW PAD Control Register
• sw_pad_ctl_pad_gpio_spi_b1_00
  SW_PAD_CTL_PAD_GPIO_SPI_B1_00 SW PAD Control Register
• sw_pad_ctl_pad_gpio_spi_b1_01
  SW_PAD_CTL_PAD_GPIO_SPI_B1_01 SW PAD Control Register
• sw_pad_ctl_pad_gpio_spi_b1_02
  SW_PAD_CTL_PAD_GPIO_SPI_B1_02 SW PAD Control Register
• sw_pad_ctl_pad_gpio_spi_b1_03
  SW_PAD_CTL_PAD_GPIO_SPI_B1_03 SW PAD Control Register
• sw_pad_ctl_pad_gpio_spi_b1_04
  SW_PAD_CTL_PAD_GPIO_SPI_B1_04 SW PAD Control Register
• sw_pad_ctl_pad_gpio_spi_b1_05
  SW_PAD_CTL_PAD_GPIO_SPI_B1_05 SW PAD Control Register
• sw_pad_ctl_pad_gpio_spi_b1_06
  SW_PAD_CTL_PAD_GPIO_SPI_B1_06 SW PAD Control Register
• sw_pad_ctl_pad_gpio_spi_b1_07
  SW_PAD_CTL_PAD_GPIO_SPI_B1_07 SW PAD Control Register
• usb_otg1_oc_select_input
  USB_OTG1_OC_SELECT_INPUT DAISY Register
• usb_otg2_oc_select_input
  USB_OTG2_OC_SELECT_INPUT DAISY Register
• usdhc1_cd_b_select_input
  USDHC1_CD_B_SELECT_INPUT DAISY Register
• usdhc1_wp_select_input
  USDHC1_WP_SELECT_INPUT DAISY Register
• usdhc2_cd_b_select_input
  USDHC2_CD_B_SELECT_INPUT DAISY Register
• usdhc2_clk_select_input
  USDHC2_CLK_SELECT_INPUT DAISY Register
• usdhc2_cmd_select_input
  USDHC2_CMD_SELECT_INPUT DAISY Register
• usdhc2_data0_select_input
  USDHC2_DATA0_SELECT_INPUT DAISY Register
• usdhc2_data1_select_input
  USDHC2_DATA1_SELECT_INPUT DAISY Register
• usdhc2_data2_select_input
  USDHC2_DATA2_SELECT_INPUT DAISY Register
• usdhc2_data3_select_input
  USDHC2_DATA3_SELECT_INPUT DAISY Register
• usdhc2_data4_select_input
  USDHC2_DATA4_SELECT_INPUT DAISY Register
• usdhc2_data5_select_input
  USDHC2_DATA5_SELECT_INPUT DAISY Register
• usdhc2_data6_select_input
  USDHC2_DATA6_SELECT_INPUT DAISY Register
• usdhc2_data7_select_input
  USDHC2_DATA7_SELECT_INPUT DAISY Register
• usdhc2_wp_select_input
  USDHC2_WP_SELECT_INPUT DAISY Register
• xbar1_in02_select_input
  XBAR1_IN02_SELECT_INPUT DAISY Register
• xbar1_in03_select_input
  XBAR1_IN03_SELECT_INPUT DAISY Register
• xbar1_in04_select_input
  XBAR1_IN04_SELECT_INPUT DAISY Register
• xbar1_in05_select_input
  XBAR1_IN05_SELECT_INPUT DAISY Register
• xbar1_in06_select_input
  XBAR1_IN06_SELECT_INPUT DAISY Register
• xbar1_in07_select_input
  XBAR1_IN07_SELECT_INPUT DAISY Register
• xbar1_in08_select_input
  XBAR1_IN08_SELECT_INPUT DAISY Register
• xbar1_in09_select_input
  XBAR1_IN09_SELECT_INPUT DAISY Register
• xbar1_in14_select_input
  XBAR1_IN14_SELECT_INPUT DAISY Register
• xbar1_in15_select_input
  XBAR1_IN15_SELECT_INPUT DAISY Register
• xbar1_in16_select_input
  XBAR1_IN16_SELECT_INPUT DAISY Register
• xbar1_in17_select_input
  XBAR1_IN17_SELECT_INPUT DAISY Register
• xbar1_in18_select_input
  XBAR1_IN18_SELECT_INPUT DAISY Register
• xbar1_in19_select_input
  XBAR1_IN19_SELECT_INPUT DAISY Register
• xbar1_in20_select_input
  XBAR1_IN20_SELECT_INPUT DAISY Register
• xbar1_in21_select_input
  XBAR1_IN23_SELECT_INPUT DAISY Register
• xbar1_in22_select_input
  XBAR1_IN22_SELECT_INPUT DAISY Register
• xbar1_in23_select_input
  XBAR1_IN23_SELECT_INPUT DAISY Register
• xbar1_in24_select_input
  XBAR1_IN24_SELECT_INPUT DAISY Register
• xbar1_in25_select_input
  XBAR1_IN25_SELECT_INPUT DAISY Register

Structs

• R
  Register/field reader
• Reg
  This structure provides volatile access to register
• RegisterBlock
  Register block
• W
  Register writer

Enums

• Variant
  Used if enumerated values cover not the whole range

Traits

• Readable
  This trait shows that register has read method
• ResetValue
  Reset value of the register
• Writable
  This trait shows that register has write, write_with_zero and reset method

Type Aliases

• ANATOP_USB_OTG1_ID_SELECT_INPUT
  ANATOP_USB_OTG1_ID_SELECT_INPUT DAISY Register
• ANATOP_USB_OTG2_ID_SELECT_INPUT
  ANATOP_USB_OTG2_ID_SELECT_INPUT DAISY Register
• CANFD_IPP_IND_CANRX_SELECT_INPUT
  CANFD_IPP_IND_CANRX_SELECT_INPUT DAISY Register
• CCM_PMIC_READY_SELECT_INPUT
  CCM_PMIC_READY_SELECT_INPUT DAISY Register
• CSI_DATA02_SELECT_INPUT
  CSI_DATA02_SELECT_INPUT DAISY Register
• CSI_DATA03_SELECT_INPUT
  CSI_DATA03_SELECT_INPUT DAISY Register
• CSI_DATA04_SELECT_INPUT
  CSI_DATA04_SELECT_INPUT DAISY Register
• CSI_DATA05_SELECT_INPUT
  CSI_DATA05_SELECT_INPUT DAISY Register
• CSI_DATA06_SELECT_INPUT
  CSI_DATA06_SELECT_INPUT DAISY Register
• CSI_DATA07_SELECT_INPUT
  CSI_DATA07_SELECT_INPUT DAISY Register
• CSI_DATA08_SELECT_INPUT
  CSI_DATA08_SELECT_INPUT DAISY Register
• CSI_DATA09_SELECT_INPUT
  CSI_DATA09_SELECT_INPUT DAISY Register
• CSI_HSYNC_SELECT_INPUT
  CSI_HSYNC_SELECT_INPUT DAISY Register
• CSI_PIXCLK_SELECT_INPUT
  CSI_PIXCLK_SELECT_INPUT DAISY Register
• CSI_VSYNC_SELECT_INPUT
  CSI_VSYNC_SELECT_INPUT DAISY Register
• ENET0_RXDATA_SELECT_INPUT
  ENET0_RXDATA_SELECT_INPUT DAISY Register
• ENET0_TIMER_SELECT_INPUT
  ENET0_TIMER_SELECT_INPUT DAISY Register
• ENET1_RXDATA_SELECT_INPUT
  ENET1_RXDATA_SELECT_INPUT DAISY Register
• ENET2_IPG_CLK_RMII_SELECT_INPUT
  ENET2_IPG_CLK_RMII_SELECT_INPUT DAISY Register
• ENET2_IPP_IND_MAC0_MDIO_SELECT_INPUT
  ENET2_IPP_IND_MAC0_MDIO_SELECT_INPUT DAISY Register
• ENET2_IPP_IND_MAC0_RXDATA_SELECT_INPUT_0
  ENET2_IPP_IND_MAC0_RXDATA_SELECT_INPUT_0 DAISY Register
• ENET2_IPP_IND_MAC0_RXDATA_SELECT_INPUT_1
  ENET2_IPP_IND_MAC0_RXDATA_SELECT_INPUT_1 DAISY Register
• ENET2_IPP_IND_MAC0_RXEN_SELECT_INPUT
  ENET2_IPP_IND_MAC0_RXEN_SELECT_INPUT DAISY Register
• ENET2_IPP_IND_MAC0_RXERR_SELECT_INPUT
  ENET2_IPP_IND_MAC0_RXERR_SELECT_INPUT DAISY Register
• ENET2_IPP_IND_MAC0_TIMER_SELECT_INPUT_0
  ENET2_IPP_IND_MAC0_TIMER_SELECT_INPUT_0 DAISY Register
• ENET2_IPP_IND_MAC0_TXCLK_SELECT_INPUT
  ENET2_IPP_IND_MAC0_TXCLK_SELECT_INPUT DAISY Register
• ENET_IPG_CLK_RMII_SELECT_INPUT
  ENET_IPG_CLK_RMII_SELECT_INPUT DAISY Register
• ENET_MDIO_SELECT_INPUT
  ENET_MDIO_SELECT_INPUT DAISY Register
• ENET_RXEN_SELECT_INPUT
  ENET_RXEN_SELECT_INPUT DAISY Register
• ENET_RXERR_SELECT_INPUT
  ENET_RXERR_SELECT_INPUT DAISY Register
• ENET_TXCLK_SELECT_INPUT
  ENET_TXCLK_SELECT_INPUT DAISY Register
• FLEXCAN1_RX_SELECT_INPUT
  FLEXCAN1_RX_SELECT_INPUT DAISY Register
• FLEXCAN2_RX_SELECT_INPUT
  FLEXCAN2_RX_SELECT_INPUT DAISY Register
• FLEXPWM1_PWMA0_SELECT_INPUT
  FLEXPWM1_PWMA0_SELECT_INPUT DAISY Register
• FLEXPWM1_PWMA1_SELECT_INPUT
  FLEXPWM1_PWMA1_SELECT_INPUT DAISY Register
• FLEXPWM1_PWMA2_SELECT_INPUT
  FLEXPWM1_PWMA2_SELECT_INPUT DAISY Register
• FLEXPWM1_PWMA3_SELECT_INPUT
  FLEXPWM1_PWMA3_SELECT_INPUT DAISY Register
• FLEXPWM1_PWMB0_SELECT_INPUT
  FLEXPWM1_PWMB0_SELECT_INPUT DAISY Register
• FLEXPWM1_PWMB1_SELECT_INPUT
  FLEXPWM1_PWMB1_SELECT_INPUT DAISY Register
• FLEXPWM1_PWMB2_SELECT_INPUT
  FLEXPWM1_PWMB2_SELECT_INPUT DAISY Register
• FLEXPWM1_PWMB3_SELECT_INPUT
  FLEXPWM1_PWMB3_SELECT_INPUT DAISY Register
• FLEXPWM2_PWMA0_SELECT_INPUT
  FLEXPWM2_PWMA0_SELECT_INPUT DAISY Register
• FLEXPWM2_PWMA1_SELECT_INPUT
  FLEXPWM2_PWMA1_SELECT_INPUT DAISY Register
• FLEXPWM2_PWMA2_SELECT_INPUT
  FLEXPWM2_PWMA2_SELECT_INPUT DAISY Register
• FLEXPWM2_PWMA3_SELECT_INPUT
  FLEXPWM2_PWMA3_SELECT_INPUT DAISY Register
• FLEXPWM2_PWMB0_SELECT_INPUT
  FLEXPWM2_PWMB0_SELECT_INPUT DAISY Register
• FLEXPWM2_PWMB1_SELECT_INPUT
  FLEXPWM2_PWMB1_SELECT_INPUT DAISY Register
• FLEXPWM2_PWMB2_SELECT_INPUT
  FLEXPWM2_PWMB2_SELECT_INPUT DAISY Register
• FLEXPWM2_PWMB3_SELECT_INPUT
  FLEXPWM2_PWMB3_SELECT_INPUT DAISY Register
• FLEXPWM4_PWMA0_SELECT_INPUT
  FLEXPWM4_PWMA0_SELECT_INPUT DAISY Register
• FLEXPWM4_PWMA1_SELECT_INPUT
  FLEXPWM4_PWMA1_SELECT_INPUT DAISY Register
• FLEXPWM4_PWMA2_SELECT_INPUT
  FLEXPWM4_PWMA2_SELECT_INPUT DAISY Register
• FLEXPWM4_PWMA3_SELECT_INPUT
  FLEXPWM4_PWMA3_SELECT_INPUT DAISY Register
• FLEXSPI2_IPP_IND_DQS_FA_SELECT_INPUT
  FLEXSPI2_IPP_IND_DQS_FA_SELECT_INPUT DAISY Register
• FLEXSPI2_IPP_IND_IO_FA_BIT0_SELECT_INPUT
  FLEXSPI2_IPP_IND_IO_FA_BIT0_SELECT_INPUT DAISY Register
• FLEXSPI2_IPP_IND_IO_FA_BIT1_SELECT_INPUT
  FLEXSPI2_IPP_IND_IO_FA_BIT1_SELECT_INPUT DAISY Register
• FLEXSPI2_IPP_IND_IO_FA_BIT2_SELECT_INPUT
  FLEXSPI2_IPP_IND_IO_FA_BIT2_SELECT_INPUT DAISY Register
• FLEXSPI2_IPP_IND_IO_FA_BIT3_SELECT_INPUT
  FLEXSPI2_IPP_IND_IO_FA_BIT3_SELECT_INPUT DAISY Register
• FLEXSPI2_IPP_IND_IO_FB_BIT0_SELECT_INPUT
  FLEXSPI2_IPP_IND_IO_FB_BIT0_SELECT_INPUT DAISY Register
• FLEXSPI2_IPP_IND_IO_FB_BIT1_SELECT_INPUT
  FLEXSPI2_IPP_IND_IO_FB_BIT1_SELECT_INPUT DAISY Register
• FLEXSPI2_IPP_IND_IO_FB_BIT2_SELECT_INPUT
  FLEXSPI2_IPP_IND_IO_FB_BIT2_SELECT_INPUT DAISY Register
• FLEXSPI2_IPP_IND_IO_FB_BIT3_SELECT_INPUT
  FLEXSPI2_IPP_IND_IO_FB_BIT3_SELECT_INPUT DAISY Register
• FLEXSPI2_IPP_IND_SCK_FA_SELECT_INPUT
  FLEXSPI2_IPP_IND_SCK_FA_SELECT_INPUT DAISY Register
• FLEXSPI2_IPP_IND_SCK_FB_SELECT_INPUT
  FLEXSPI2_IPP_IND_SCK_FB_SELECT_INPUT DAISY Register
• FLEXSPIA_DATA0_SELECT_INPUT
  FLEXSPIA_DATA0_SELECT_INPUT DAISY Register
• FLEXSPIA_DATA1_SELECT_INPUT
  FLEXSPIA_DATA1_SELECT_INPUT DAISY Register
• FLEXSPIA_DATA2_SELECT_INPUT
  FLEXSPIA_DATA2_SELECT_INPUT DAISY Register
• FLEXSPIA_DATA3_SELECT_INPUT
  FLEXSPIA_DATA3_SELECT_INPUT DAISY Register
• FLEXSPIA_DQS_SELECT_INPUT
  FLEXSPIA_DQS_SELECT_INPUT DAISY Register
• FLEXSPIA_SCK_SELECT_INPUT
  FLEXSPIA_SCK_SELECT_INPUT DAISY Register
• FLEXSPIB_DATA0_SELECT_INPUT
  FLEXSPIB_DATA0_SELECT_INPUT DAISY Register
• FLEXSPIB_DATA1_SELECT_INPUT
  FLEXSPIB_DATA1_SELECT_INPUT DAISY Register
• FLEXSPIB_DATA2_SELECT_INPUT
  FLEXSPIB_DATA2_SELECT_INPUT DAISY Register
• FLEXSPIB_DATA3_SELECT_INPUT
  FLEXSPIB_DATA3_SELECT_INPUT DAISY Register
• GPT1_IPP_IND_CAPIN1_SELECT_INPUT
  GPT1_IPP_IND_CAPIN1_SELECT_INPUT DAISY Register
• GPT1_IPP_IND_CAPIN2_SELECT_INPUT
  GPT1_IPP_IND_CAPIN2_SELECT_INPUT DAISY Register
• GPT1_IPP_IND_CLKIN_SELECT_INPUT
  GPT1_IPP_IND_CLKIN_SELECT_INPUT DAISY Register
• GPT2_IPP_IND_CAPIN1_SELECT_INPUT
  GPT2_IPP_IND_CAPIN1_SELECT_INPUT DAISY Register
• GPT2_IPP_IND_CAPIN2_SELECT_INPUT
  GPT2_IPP_IND_CAPIN2_SELECT_INPUT DAISY Register
• GPT2_IPP_IND_CLKIN_SELECT_INPUT
  GPT2_IPP_IND_CLKIN_SELECT_INPUT DAISY Register
• LPI2C1_SCL_SELECT_INPUT
  LPI2C1_SCL_SELECT_INPUT DAISY Register
• LPI2C1_SDA_SELECT_INPUT
  LPI2C1_SDA_SELECT_INPUT DAISY Register
• LPI2C2_SCL_SELECT_INPUT
  LPI2C2_SCL_SELECT_INPUT DAISY Register
• LPI2C2_SDA_SELECT_INPUT
  LPI2C2_SDA_SELECT_INPUT DAISY Register
• LPI2C3_SCL_SELECT_INPUT
  LPI2C3_SCL_SELECT_INPUT DAISY Register
• LPI2C3_SDA_SELECT_INPUT
  LPI2C3_SDA_SELECT_INPUT DAISY Register
• LPI2C4_SCL_SELECT_INPUT
  LPI2C4_SCL_SELECT_INPUT DAISY Register
• LPI2C4_SDA_SELECT_INPUT
  LPI2C4_SDA_SELECT_INPUT DAISY Register
• LPSPI1_PCS0_SELECT_INPUT
  LPSPI1_PCS0_SELECT_INPUT DAISY Register
• LPSPI1_SCK_SELECT_INPUT
  LPSPI1_SCK_SELECT_INPUT DAISY Register
• LPSPI1_SDI_SELECT_INPUT
  LPSPI1_SDI_SELECT_INPUT DAISY Register
• LPSPI1_SDO_SELECT_INPUT
  LPSPI1_SDO_SELECT_INPUT DAISY Register
• LPSPI2_PCS0_SELECT_INPUT
  LPSPI2_PCS0_SELECT_INPUT DAISY Register
• LPSPI2_SCK_SELECT_INPUT
  LPSPI2_SCK_SELECT_INPUT DAISY Register
• LPSPI2_SDI_SELECT_INPUT
  LPSPI2_SDI_SELECT_INPUT DAISY Register
• LPSPI2_SDO_SELECT_INPUT
  LPSPI2_SDO_SELECT_INPUT DAISY Register
• LPSPI3_PCS0_SELECT_INPUT
  LPSPI3_PCS0_SELECT_INPUT DAISY Register
• LPSPI3_SCK_SELECT_INPUT
  LPSPI3_SCK_SELECT_INPUT DAISY Register
• LPSPI3_SDI_SELECT_INPUT
  LPSPI3_SDI_SELECT_INPUT DAISY Register
• LPSPI3_SDO_SELECT_INPUT
  LPSPI3_SDO_SELECT_INPUT DAISY Register
• LPSPI4_PCS0_SELECT_INPUT
  LPSPI4_PCS0_SELECT_INPUT DAISY Register
• LPSPI4_SCK_SELECT_INPUT
  LPSPI4_SCK_SELECT_INPUT DAISY Register
• LPSPI4_SDI_SELECT_INPUT
  LPSPI4_SDI_SELECT_INPUT DAISY Register
• LPSPI4_SDO_SELECT_INPUT
  LPSPI4_SDO_SELECT_INPUT DAISY Register
• LPUART2_RX_SELECT_INPUT
  LPUART2_RX_SELECT_INPUT DAISY Register
• LPUART2_TX_SELECT_INPUT
  LPUART2_TX_SELECT_INPUT DAISY Register
• LPUART3_CTS_B_SELECT_INPUT
  LPUART3_CTS_B_SELECT_INPUT DAISY Register
• LPUART3_RX_SELECT_INPUT
  LPUART3_RX_SELECT_INPUT DAISY Register
• LPUART3_TX_SELECT_INPUT
  LPUART3_TX_SELECT_INPUT DAISY Register
• LPUART4_RX_SELECT_INPUT
  LPUART4_RX_SELECT_INPUT DAISY Register
• LPUART4_TX_SELECT_INPUT
  LPUART4_TX_SELECT_INPUT DAISY Register
• LPUART5_RX_SELECT_INPUT
  LPUART5_RX_SELECT_INPUT DAISY Register
• LPUART5_TX_SELECT_INPUT
  LPUART5_TX_SELECT_INPUT DAISY Register
• LPUART6_RX_SELECT_INPUT
  LPUART6_RX_SELECT_INPUT DAISY Register
• LPUART6_TX_SELECT_INPUT
  LPUART6_TX_SELECT_INPUT DAISY Register
• LPUART7_RX_SELECT_INPUT
  LPUART7_RX_SELECT_INPUT DAISY Register
• LPUART7_TX_SELECT_INPUT
  LPUART7_TX_SELECT_INPUT DAISY Register
• LPUART8_RX_SELECT_INPUT
  LPUART8_RX_SELECT_INPUT DAISY Register
• LPUART8_TX_SELECT_INPUT
  LPUART8_TX_SELECT_INPUT DAISY Register
• NMI_SELECT_INPUT
  NMI_GLUE_NMI_SELECT_INPUT DAISY Register
• QTIMER2_TIMER0_SELECT_INPUT
  QTIMER2_TIMER0_SELECT_INPUT DAISY Register
• QTIMER2_TIMER1_SELECT_INPUT
  QTIMER2_TIMER1_SELECT_INPUT DAISY Register
• QTIMER2_TIMER2_SELECT_INPUT
  QTIMER2_TIMER2_SELECT_INPUT DAISY Register
• QTIMER2_TIMER3_SELECT_INPUT
  QTIMER2_TIMER3_SELECT_INPUT DAISY Register
• QTIMER3_TIMER0_SELECT_INPUT
  QTIMER3_TIMER0_SELECT_INPUT DAISY Register
• QTIMER3_TIMER1_SELECT_INPUT
  QTIMER3_TIMER1_SELECT_INPUT DAISY Register
• QTIMER3_TIMER2_SELECT_INPUT
  QTIMER3_TIMER2_SELECT_INPUT DAISY Register
• QTIMER3_TIMER3_SELECT_INPUT
  QTIMER3_TIMER3_SELECT_INPUT DAISY Register
• SAI1_MCLK2_SELECT_INPUT
  SAI1_MCLK2_SELECT_INPUT DAISY Register
• SAI1_RX_BCLK_SELECT_INPUT
  SAI1_RX_BCLK_SELECT_INPUT DAISY Register
• SAI1_RX_DATA0_SELECT_INPUT
  SAI1_RX_DATA0_SELECT_INPUT DAISY Register
• SAI1_RX_DATA1_SELECT_INPUT
  SAI1_RX_DATA1_SELECT_INPUT DAISY Register
• SAI1_RX_DATA2_SELECT_INPUT
  SAI1_RX_DATA2_SELECT_INPUT DAISY Register
• SAI1_RX_DATA3_SELECT_INPUT
  SAI1_RX_DATA3_SELECT_INPUT DAISY Register
• SAI1_RX_SYNC_SELECT_INPUT
  SAI1_RX_SYNC_SELECT_INPUT DAISY Register
• SAI1_TX_BCLK_SELECT_INPUT
  SAI1_TX_BCLK_SELECT_INPUT DAISY Register
• SAI1_TX_SYNC_SELECT_INPUT
  SAI1_TX_SYNC_SELECT_INPUT DAISY Register
• SAI2_MCLK2_SELECT_INPUT
  SAI2_MCLK2_SELECT_INPUT DAISY Register
• SAI2_RX_BCLK_SELECT_INPUT
  SAI2_RX_BCLK_SELECT_INPUT DAISY Register
• SAI2_RX_DATA0_SELECT_INPUT
  SAI2_RX_DATA0_SELECT_INPUT DAISY Register
• SAI2_RX_SYNC_SELECT_INPUT
  SAI2_RX_SYNC_SELECT_INPUT DAISY Register
• SAI2_TX_BCLK_SELECT_INPUT
  SAI2_TX_BCLK_SELECT_INPUT DAISY Register
• SAI2_TX_SYNC_SELECT_INPUT
  SAI2_TX_SYNC_SELECT_INPUT DAISY Register
• SAI3_IPG_CLK_SAI_MCLK_SELECT_INPUT_2
  SAI3_IPG_CLK_SAI_MCLK_SELECT_INPUT_2 DAISY Register
• SAI3_IPP_IND_SAI_RXBCLK_SELECT_INPUT
  SAI3_IPP_IND_SAI_RXBCLK_SELECT_INPUT DAISY Register
• SAI3_IPP_IND_SAI_RXDATA_SELECT_INPUT_0
  SAI3_IPP_IND_SAI_RXDATA_SELECT_INPUT_0 DAISY Register
• SAI3_IPP_IND_SAI_RXSYNC_SELECT_INPUT
  SAI3_IPP_IND_SAI_RXSYNC_SELECT_INPUT DAISY Register
• SAI3_IPP_IND_SAI_TXBCLK_SELECT_INPUT
  SAI3_IPP_IND_SAI_TXBCLK_SELECT_INPUT DAISY Register
• SAI3_IPP_IND_SAI_TXSYNC_SELECT_INPUT
  SAI3_IPP_IND_SAI_TXSYNC_SELECT_INPUT DAISY Register
• SEMC_I_IPP_IND_DQS4_SELECT_INPUT
  SEMC_I_IPP_IND_DQS4_SELECT_INPUT DAISY Register
• SPDIF_IN_SELECT_INPUT
  SPDIF_IN_SELECT_INPUT DAISY Register
• SW_MUX_CTL_PAD_GPIO_AD_B0_00
  SW_MUX_CTL_PAD_GPIO_AD_B0_00 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B0_01
  SW_MUX_CTL_PAD_GPIO_AD_B0_01 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B0_02
  SW_MUX_CTL_PAD_GPIO_AD_B0_02 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B0_03
  SW_MUX_CTL_PAD_GPIO_AD_B0_03 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B0_04
  SW_MUX_CTL_PAD_GPIO_AD_B0_04 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B0_05
  SW_MUX_CTL_PAD_GPIO_AD_B0_05 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B0_06
  SW_MUX_CTL_PAD_GPIO_AD_B0_06 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B0_07
  SW_MUX_CTL_PAD_GPIO_AD_B0_07 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B0_08
  SW_MUX_CTL_PAD_GPIO_AD_B0_08 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B0_09
  SW_MUX_CTL_PAD_GPIO_AD_B0_09 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B0_10
  SW_MUX_CTL_PAD_GPIO_AD_B0_10 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B0_11
  SW_MUX_CTL_PAD_GPIO_AD_B0_11 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B0_12
  SW_MUX_CTL_PAD_GPIO_AD_B0_12 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B0_13
  SW_MUX_CTL_PAD_GPIO_AD_B0_13 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B0_14
  SW_MUX_CTL_PAD_GPIO_AD_B0_14 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B0_15
  SW_MUX_CTL_PAD_GPIO_AD_B0_15 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B1_00
  SW_MUX_CTL_PAD_GPIO_AD_B1_00 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B1_01
  SW_MUX_CTL_PAD_GPIO_AD_B1_01 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B1_02
  SW_MUX_CTL_PAD_GPIO_AD_B1_02 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B1_03
  SW_MUX_CTL_PAD_GPIO_AD_B1_03 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B1_04
  SW_MUX_CTL_PAD_GPIO_AD_B1_04 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B1_05
  SW_MUX_CTL_PAD_GPIO_AD_B1_05 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B1_06
  SW_MUX_CTL_PAD_GPIO_AD_B1_06 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B1_07
  SW_MUX_CTL_PAD_GPIO_AD_B1_07 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B1_08
  SW_MUX_CTL_PAD_GPIO_AD_B1_08 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B1_09
  SW_MUX_CTL_PAD_GPIO_AD_B1_09 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B1_10
  SW_MUX_CTL_PAD_GPIO_AD_B1_10 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B1_11
  SW_MUX_CTL_PAD_GPIO_AD_B1_11 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B1_12
  SW_MUX_CTL_PAD_GPIO_AD_B1_12 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B1_13
  SW_MUX_CTL_PAD_GPIO_AD_B1_13 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B1_14
  SW_MUX_CTL_PAD_GPIO_AD_B1_14 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_AD_B1_15
  SW_MUX_CTL_PAD_GPIO_AD_B1_15 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B0_00
  SW_MUX_CTL_PAD_GPIO_B0_00 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B0_01
  SW_MUX_CTL_PAD_GPIO_B0_01 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B0_02
  SW_MUX_CTL_PAD_GPIO_B0_02 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B0_03
  SW_MUX_CTL_PAD_GPIO_B0_03 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B0_04
  SW_MUX_CTL_PAD_GPIO_B0_04 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B0_05
  SW_MUX_CTL_PAD_GPIO_B0_05 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B0_06
  SW_MUX_CTL_PAD_GPIO_B0_06 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B0_07
  SW_MUX_CTL_PAD_GPIO_B0_07 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B0_08
  SW_MUX_CTL_PAD_GPIO_B0_08 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B0_09
  SW_MUX_CTL_PAD_GPIO_B0_09 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B0_10
  SW_MUX_CTL_PAD_GPIO_B0_10 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B0_11
  SW_MUX_CTL_PAD_GPIO_B0_11 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B0_12
  SW_MUX_CTL_PAD_GPIO_B0_12 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B0_13
  SW_MUX_CTL_PAD_GPIO_B0_13 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B0_14
  SW_MUX_CTL_PAD_GPIO_B0_14 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B0_15
  SW_MUX_CTL_PAD_GPIO_B0_15 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B1_00
  SW_MUX_CTL_PAD_GPIO_B1_00 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B1_01
  SW_MUX_CTL_PAD_GPIO_B1_01 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B1_02
  SW_MUX_CTL_PAD_GPIO_B1_02 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B1_03
  SW_MUX_CTL_PAD_GPIO_B1_03 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B1_04
  SW_MUX_CTL_PAD_GPIO_B1_04 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B1_05
  SW_MUX_CTL_PAD_GPIO_B1_05 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B1_06
  SW_MUX_CTL_PAD_GPIO_B1_06 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B1_07
  SW_MUX_CTL_PAD_GPIO_B1_07 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B1_08
  SW_MUX_CTL_PAD_GPIO_B1_08 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B1_09
  SW_MUX_CTL_PAD_GPIO_B1_09 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B1_10
  SW_MUX_CTL_PAD_GPIO_B1_10 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B1_11
  SW_MUX_CTL_PAD_GPIO_B1_11 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B1_12
  SW_MUX_CTL_PAD_GPIO_B1_12 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B1_13
  SW_MUX_CTL_PAD_GPIO_B1_13 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B1_14
  SW_MUX_CTL_PAD_GPIO_B1_14 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_B1_15
  SW_MUX_CTL_PAD_GPIO_B1_15 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_00
  SW_MUX_CTL_PAD_GPIO_EMC_00 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_01
  SW_MUX_CTL_PAD_GPIO_EMC_01 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_02
  SW_MUX_CTL_PAD_GPIO_EMC_02 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_03
  SW_MUX_CTL_PAD_GPIO_EMC_03 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_04
  SW_MUX_CTL_PAD_GPIO_EMC_04 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_05
  SW_MUX_CTL_PAD_GPIO_EMC_05 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_06
  SW_MUX_CTL_PAD_GPIO_EMC_06 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_07
  SW_MUX_CTL_PAD_GPIO_EMC_07 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_08
  SW_MUX_CTL_PAD_GPIO_EMC_08 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_09
  SW_MUX_CTL_PAD_GPIO_EMC_09 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_10
  SW_MUX_CTL_PAD_GPIO_EMC_10 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_11
  SW_MUX_CTL_PAD_GPIO_EMC_11 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_12
  SW_MUX_CTL_PAD_GPIO_EMC_12 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_13
  SW_MUX_CTL_PAD_GPIO_EMC_13 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_14
  SW_MUX_CTL_PAD_GPIO_EMC_14 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_15
  SW_MUX_CTL_PAD_GPIO_EMC_15 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_16
  SW_MUX_CTL_PAD_GPIO_EMC_16 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_17
  SW_MUX_CTL_PAD_GPIO_EMC_17 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_18
  SW_MUX_CTL_PAD_GPIO_EMC_18 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_19
  SW_MUX_CTL_PAD_GPIO_EMC_19 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_20
  SW_MUX_CTL_PAD_GPIO_EMC_20 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_21
  SW_MUX_CTL_PAD_GPIO_EMC_21 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_22
  SW_MUX_CTL_PAD_GPIO_EMC_22 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_23
  SW_MUX_CTL_PAD_GPIO_EMC_23 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_24
  SW_MUX_CTL_PAD_GPIO_EMC_24 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_25
  SW_MUX_CTL_PAD_GPIO_EMC_25 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_26
  SW_MUX_CTL_PAD_GPIO_EMC_26 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_27
  SW_MUX_CTL_PAD_GPIO_EMC_27 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_28
  SW_MUX_CTL_PAD_GPIO_EMC_28 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_29
  SW_MUX_CTL_PAD_GPIO_EMC_29 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_30
  SW_MUX_CTL_PAD_GPIO_EMC_30 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_31
  SW_MUX_CTL_PAD_GPIO_EMC_31 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_32
  SW_MUX_CTL_PAD_GPIO_EMC_32 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_33
  SW_MUX_CTL_PAD_GPIO_EMC_33 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_34
  SW_MUX_CTL_PAD_GPIO_EMC_34 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_35
  SW_MUX_CTL_PAD_GPIO_EMC_35 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_36
  SW_MUX_CTL_PAD_GPIO_EMC_36 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_37
  SW_MUX_CTL_PAD_GPIO_EMC_37 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_38
  SW_MUX_CTL_PAD_GPIO_EMC_38 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_39
  SW_MUX_CTL_PAD_GPIO_EMC_39 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_40
  SW_MUX_CTL_PAD_GPIO_EMC_40 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_EMC_41
  SW_MUX_CTL_PAD_GPIO_EMC_41 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SD_B0_00
  SW_MUX_CTL_PAD_GPIO_SD_B0_00 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SD_B0_01
  SW_MUX_CTL_PAD_GPIO_SD_B0_01 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SD_B0_02
  SW_MUX_CTL_PAD_GPIO_SD_B0_02 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SD_B0_03
  SW_MUX_CTL_PAD_GPIO_SD_B0_03 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SD_B0_04
  SW_MUX_CTL_PAD_GPIO_SD_B0_04 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SD_B0_05
  SW_MUX_CTL_PAD_GPIO_SD_B0_05 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SD_B1_00
  SW_MUX_CTL_PAD_GPIO_SD_B1_00 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SD_B1_01
  SW_MUX_CTL_PAD_GPIO_SD_B1_01 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SD_B1_02
  SW_MUX_CTL_PAD_GPIO_SD_B1_02 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SD_B1_03
  SW_MUX_CTL_PAD_GPIO_SD_B1_03 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SD_B1_04
  SW_MUX_CTL_PAD_GPIO_SD_B1_04 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SD_B1_05
  SW_MUX_CTL_PAD_GPIO_SD_B1_05 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SD_B1_06
  SW_MUX_CTL_PAD_GPIO_SD_B1_06 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SD_B1_07
  SW_MUX_CTL_PAD_GPIO_SD_B1_07 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SD_B1_08
  SW_MUX_CTL_PAD_GPIO_SD_B1_08 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SD_B1_09
  SW_MUX_CTL_PAD_GPIO_SD_B1_09 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SD_B1_10
  SW_MUX_CTL_PAD_GPIO_SD_B1_10 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SD_B1_11
  SW_MUX_CTL_PAD_GPIO_SD_B1_11 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SPI_B0_00
  SW_MUX_CTL_PAD_GPIO_SPI_B0_00 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SPI_B0_01
  SW_MUX_CTL_PAD_GPIO_SPI_B0_01 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SPI_B0_02
  SW_MUX_CTL_PAD_GPIO_SPI_B0_02 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SPI_B0_03
  SW_MUX_CTL_PAD_GPIO_SPI_B0_03 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SPI_B0_04
  SW_MUX_CTL_PAD_GPIO_SPI_B0_04 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SPI_B0_05
  SW_MUX_CTL_PAD_GPIO_SPI_B0_05 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SPI_B0_06
  SW_MUX_CTL_PAD_GPIO_SPI_B0_06 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SPI_B0_07
  SW_MUX_CTL_PAD_GPIO_SPI_B0_07 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SPI_B0_08
  SW_MUX_CTL_PAD_GPIO_SPI_B0_08 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SPI_B0_09
  SW_MUX_CTL_PAD_GPIO_SPI_B0_09 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SPI_B0_10
  SW_MUX_CTL_PAD_GPIO_SPI_B0_10 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SPI_B0_11
  SW_MUX_CTL_PAD_GPIO_SPI_B0_11 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SPI_B0_12
  SW_MUX_CTL_PAD_GPIO_SPI_B0_12 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SPI_B0_13
  SW_MUX_CTL_PAD_GPIO_SPI_B0_13 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SPI_B1_00
  SW_MUX_CTL_PAD_GPIO_SPI_B1_00 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SPI_B1_01
  SW_MUX_CTL_PAD_GPIO_SPI_B1_01 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SPI_B1_02
  SW_MUX_CTL_PAD_GPIO_SPI_B1_02 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SPI_B1_03
  SW_MUX_CTL_PAD_GPIO_SPI_B1_03 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SPI_B1_04
  SW_MUX_CTL_PAD_GPIO_SPI_B1_04 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SPI_B1_05
  SW_MUX_CTL_PAD_GPIO_SPI_B1_05 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SPI_B1_06
  SW_MUX_CTL_PAD_GPIO_SPI_B1_06 SW MUX Control Register
• SW_MUX_CTL_PAD_GPIO_SPI_B1_07
  SW_MUX_CTL_PAD_GPIO_SPI_B1_07 SW MUX Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B0_00
  SW_PAD_CTL_PAD_GPIO_AD_B0_00 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B0_01
  SW_PAD_CTL_PAD_GPIO_AD_B0_01 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B0_02
  SW_PAD_CTL_PAD_GPIO_AD_B0_02 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B0_03
  SW_PAD_CTL_PAD_GPIO_AD_B0_03 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B0_04
  SW_PAD_CTL_PAD_GPIO_AD_B0_04 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B0_05
  SW_PAD_CTL_PAD_GPIO_AD_B0_05 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B0_06
  SW_PAD_CTL_PAD_GPIO_AD_B0_06 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B0_07
  SW_PAD_CTL_PAD_GPIO_AD_B0_07 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B0_08
  SW_PAD_CTL_PAD_GPIO_AD_B0_08 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B0_09
  SW_PAD_CTL_PAD_GPIO_AD_B0_09 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B0_10
  SW_PAD_CTL_PAD_GPIO_AD_B0_10 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B0_11
  SW_PAD_CTL_PAD_GPIO_AD_B0_11 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B0_12
  SW_PAD_CTL_PAD_GPIO_AD_B0_12 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B0_13
  SW_PAD_CTL_PAD_GPIO_AD_B0_13 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B0_14
  SW_PAD_CTL_PAD_GPIO_AD_B0_14 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B0_15
  SW_PAD_CTL_PAD_GPIO_AD_B0_15 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B1_00
  SW_PAD_CTL_PAD_GPIO_AD_B1_00 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B1_01
  SW_PAD_CTL_PAD_GPIO_AD_B1_01 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B1_02
  SW_PAD_CTL_PAD_GPIO_AD_B1_02 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B1_03
  SW_PAD_CTL_PAD_GPIO_AD_B1_03 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B1_04
  SW_PAD_CTL_PAD_GPIO_AD_B1_04 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B1_05
  SW_PAD_CTL_PAD_GPIO_AD_B1_05 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B1_06
  SW_PAD_CTL_PAD_GPIO_AD_B1_06 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B1_07
  SW_PAD_CTL_PAD_GPIO_AD_B1_07 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B1_08
  SW_PAD_CTL_PAD_GPIO_AD_B1_08 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B1_09
  SW_PAD_CTL_PAD_GPIO_AD_B1_09 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B1_10
  SW_PAD_CTL_PAD_GPIO_AD_B1_10 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B1_11
  SW_PAD_CTL_PAD_GPIO_AD_B1_11 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B1_12
  SW_PAD_CTL_PAD_GPIO_AD_B1_12 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B1_13
  SW_PAD_CTL_PAD_GPIO_AD_B1_13 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B1_14
  SW_PAD_CTL_PAD_GPIO_AD_B1_14 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_AD_B1_15
  SW_PAD_CTL_PAD_GPIO_AD_B1_15 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B0_00
  SW_PAD_CTL_PAD_GPIO_B0_00 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B0_01
  SW_PAD_CTL_PAD_GPIO_B0_01 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B0_02
  SW_PAD_CTL_PAD_GPIO_B0_02 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B0_03
  SW_PAD_CTL_PAD_GPIO_B0_03 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B0_04
  SW_PAD_CTL_PAD_GPIO_B0_04 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B0_05
  SW_PAD_CTL_PAD_GPIO_B0_05 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B0_06
  SW_PAD_CTL_PAD_GPIO_B0_06 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B0_07
  SW_PAD_CTL_PAD_GPIO_B0_07 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B0_08
  SW_PAD_CTL_PAD_GPIO_B0_08 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B0_09
  SW_PAD_CTL_PAD_GPIO_B0_09 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B0_10
  SW_PAD_CTL_PAD_GPIO_B0_10 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B0_11
  SW_PAD_CTL_PAD_GPIO_B0_11 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B0_12
  SW_PAD_CTL_PAD_GPIO_B0_12 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B0_13
  SW_PAD_CTL_PAD_GPIO_B0_13 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B0_14
  SW_PAD_CTL_PAD_GPIO_B0_14 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B0_15
  SW_PAD_CTL_PAD_GPIO_B0_15 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B1_00
  SW_PAD_CTL_PAD_GPIO_B1_00 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B1_01
  SW_PAD_CTL_PAD_GPIO_B1_01 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B1_02
  SW_PAD_CTL_PAD_GPIO_B1_02 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B1_03
  SW_PAD_CTL_PAD_GPIO_B1_03 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B1_04
  SW_PAD_CTL_PAD_GPIO_B1_04 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B1_05
  SW_PAD_CTL_PAD_GPIO_B1_05 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B1_06
  SW_PAD_CTL_PAD_GPIO_B1_06 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B1_07
  SW_PAD_CTL_PAD_GPIO_B1_07 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B1_08
  SW_PAD_CTL_PAD_GPIO_B1_08 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B1_09
  SW_PAD_CTL_PAD_GPIO_B1_09 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B1_10
  SW_PAD_CTL_PAD_GPIO_B1_10 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B1_11
  SW_PAD_CTL_PAD_GPIO_B1_11 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B1_12
  SW_PAD_CTL_PAD_GPIO_B1_12 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B1_13
  SW_PAD_CTL_PAD_GPIO_B1_13 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B1_14
  SW_PAD_CTL_PAD_GPIO_B1_14 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_B1_15
  SW_PAD_CTL_PAD_GPIO_B1_15 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_00
  SW_PAD_CTL_PAD_GPIO_EMC_00 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_01
  SW_PAD_CTL_PAD_GPIO_EMC_01 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_02
  SW_PAD_CTL_PAD_GPIO_EMC_02 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_03
  SW_PAD_CTL_PAD_GPIO_EMC_03 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_04
  SW_PAD_CTL_PAD_GPIO_EMC_04 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_05
  SW_PAD_CTL_PAD_GPIO_EMC_05 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_06
  SW_PAD_CTL_PAD_GPIO_EMC_06 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_07
  SW_PAD_CTL_PAD_GPIO_EMC_07 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_08
  SW_PAD_CTL_PAD_GPIO_EMC_08 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_09
  SW_PAD_CTL_PAD_GPIO_EMC_09 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_10
  SW_PAD_CTL_PAD_GPIO_EMC_10 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_11
  SW_PAD_CTL_PAD_GPIO_EMC_11 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_12
  SW_PAD_CTL_PAD_GPIO_EMC_12 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_13
  SW_PAD_CTL_PAD_GPIO_EMC_13 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_14
  SW_PAD_CTL_PAD_GPIO_EMC_14 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_15
  SW_PAD_CTL_PAD_GPIO_EMC_15 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_16
  SW_PAD_CTL_PAD_GPIO_EMC_16 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_17
  SW_PAD_CTL_PAD_GPIO_EMC_17 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_18
  SW_PAD_CTL_PAD_GPIO_EMC_18 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_19
  SW_PAD_CTL_PAD_GPIO_EMC_19 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_20
  SW_PAD_CTL_PAD_GPIO_EMC_20 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_21
  SW_PAD_CTL_PAD_GPIO_EMC_21 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_22
  SW_PAD_CTL_PAD_GPIO_EMC_22 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_23
  SW_PAD_CTL_PAD_GPIO_EMC_23 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_24
  SW_PAD_CTL_PAD_GPIO_EMC_24 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_25
  SW_PAD_CTL_PAD_GPIO_EMC_25 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_26
  SW_PAD_CTL_PAD_GPIO_EMC_26 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_27
  SW_PAD_CTL_PAD_GPIO_EMC_27 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_28
  SW_PAD_CTL_PAD_GPIO_EMC_28 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_29
  SW_PAD_CTL_PAD_GPIO_EMC_29 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_30
  SW_PAD_CTL_PAD_GPIO_EMC_30 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_31
  SW_PAD_CTL_PAD_GPIO_EMC_31 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_32
  SW_PAD_CTL_PAD_GPIO_EMC_32 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_33
  SW_PAD_CTL_PAD_GPIO_EMC_33 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_34
  SW_PAD_CTL_PAD_GPIO_EMC_34 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_35
  SW_PAD_CTL_PAD_GPIO_EMC_35 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_36
  SW_PAD_CTL_PAD_GPIO_EMC_36 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_37
  SW_PAD_CTL_PAD_GPIO_EMC_37 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_38
  SW_PAD_CTL_PAD_GPIO_EMC_38 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_39
  SW_PAD_CTL_PAD_GPIO_EMC_39 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_40
  SW_PAD_CTL_PAD_GPIO_EMC_40 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_EMC_41
  SW_PAD_CTL_PAD_GPIO_EMC_41 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SD_B0_00
  SW_PAD_CTL_PAD_GPIO_SD_B0_00 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SD_B0_01
  SW_PAD_CTL_PAD_GPIO_SD_B0_01 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SD_B0_02
  SW_PAD_CTL_PAD_GPIO_SD_B0_02 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SD_B0_03
  SW_PAD_CTL_PAD_GPIO_SD_B0_03 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SD_B0_04
  SW_PAD_CTL_PAD_GPIO_SD_B0_04 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SD_B0_05
  SW_PAD_CTL_PAD_GPIO_SD_B0_05 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SD_B1_00
  SW_PAD_CTL_PAD_GPIO_SD_B1_00 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SD_B1_01
  SW_PAD_CTL_PAD_GPIO_SD_B1_01 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SD_B1_02
  SW_PAD_CTL_PAD_GPIO_SD_B1_02 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SD_B1_03
  SW_PAD_CTL_PAD_GPIO_SD_B1_03 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SD_B1_04
  SW_PAD_CTL_PAD_GPIO_SD_B1_04 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SD_B1_05
  SW_PAD_CTL_PAD_GPIO_SD_B1_05 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SD_B1_06
  SW_PAD_CTL_PAD_GPIO_SD_B1_06 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SD_B1_07
  SW_PAD_CTL_PAD_GPIO_SD_B1_07 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SD_B1_08
  SW_PAD_CTL_PAD_GPIO_SD_B1_08 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SD_B1_09
  SW_PAD_CTL_PAD_GPIO_SD_B1_09 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SD_B1_10
  SW_PAD_CTL_PAD_GPIO_SD_B1_10 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SD_B1_11
  SW_PAD_CTL_PAD_GPIO_SD_B1_11 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SPI_B0_00
  SW_PAD_CTL_PAD_GPIO_SPI_B0_00 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SPI_B0_01
  SW_PAD_CTL_PAD_GPIO_SPI_B0_01 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SPI_B0_02
  SW_PAD_CTL_PAD_GPIO_SPI_B0_02 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SPI_B0_03
  SW_PAD_CTL_PAD_GPIO_SPI_B0_03 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SPI_B0_04
  SW_PAD_CTL_PAD_GPIO_SPI_B0_04 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SPI_B0_05
  SW_PAD_CTL_PAD_GPIO_SPI_B0_05 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SPI_B0_06
  SW_PAD_CTL_PAD_GPIO_SPI_B0_06 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SPI_B0_07
  SW_PAD_CTL_PAD_GPIO_SPI_B0_07 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SPI_B0_08
  SW_PAD_CTL_PAD_GPIO_SPI_B0_08 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SPI_B0_09
  SW_PAD_CTL_PAD_GPIO_SPI_B0_09 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SPI_B0_10
  SW_PAD_CTL_PAD_GPIO_SPI_B0_10 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SPI_B0_11
  SW_PAD_CTL_PAD_GPIO_SPI_B0_11 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SPI_B0_12
  SW_PAD_CTL_PAD_GPIO_SPI_B0_12 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SPI_B0_13
  SW_PAD_CTL_PAD_GPIO_SPI_B0_13 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SPI_B1_00
  SW_PAD_CTL_PAD_GPIO_SPI_B1_00 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SPI_B1_01
  SW_PAD_CTL_PAD_GPIO_SPI_B1_01 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SPI_B1_02
  SW_PAD_CTL_PAD_GPIO_SPI_B1_02 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SPI_B1_03
  SW_PAD_CTL_PAD_GPIO_SPI_B1_03 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SPI_B1_04
  SW_PAD_CTL_PAD_GPIO_SPI_B1_04 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SPI_B1_05
  SW_PAD_CTL_PAD_GPIO_SPI_B1_05 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SPI_B1_06
  SW_PAD_CTL_PAD_GPIO_SPI_B1_06 SW PAD Control Register
• SW_PAD_CTL_PAD_GPIO_SPI_B1_07
  SW_PAD_CTL_PAD_GPIO_SPI_B1_07 SW PAD Control Register
• USB_OTG1_OC_SELECT_INPUT
  USB_OTG1_OC_SELECT_INPUT DAISY Register
• USB_OTG2_OC_SELECT_INPUT
  USB_OTG2_OC_SELECT_INPUT DAISY Register
• USDHC1_CD_B_SELECT_INPUT
  USDHC1_CD_B_SELECT_INPUT DAISY Register
• USDHC1_WP_SELECT_INPUT
  USDHC1_WP_SELECT_INPUT DAISY Register
• USDHC2_CD_B_SELECT_INPUT
  USDHC2_CD_B_SELECT_INPUT DAISY Register
• USDHC2_CLK_SELECT_INPUT
  USDHC2_CLK_SELECT_INPUT DAISY Register
• USDHC2_CMD_SELECT_INPUT
  USDHC2_CMD_SELECT_INPUT DAISY Register
• USDHC2_DATA0_SELECT_INPUT
  USDHC2_DATA0_SELECT_INPUT DAISY Register
• USDHC2_DATA1_SELECT_INPUT
  USDHC2_DATA1_SELECT_INPUT DAISY Register
• USDHC2_DATA2_SELECT_INPUT
  USDHC2_DATA2_SELECT_INPUT DAISY Register
• USDHC2_DATA3_SELECT_INPUT
  USDHC2_DATA3_SELECT_INPUT DAISY Register
• USDHC2_DATA4_SELECT_INPUT
  USDHC2_DATA4_SELECT_INPUT DAISY Register
• USDHC2_DATA5_SELECT_INPUT
  USDHC2_DATA5_SELECT_INPUT DAISY Register
• USDHC2_DATA6_SELECT_INPUT
  USDHC2_DATA6_SELECT_INPUT DAISY Register
• USDHC2_DATA7_SELECT_INPUT
  USDHC2_DATA7_SELECT_INPUT DAISY Register
• USDHC2_WP_SELECT_INPUT
  USDHC2_WP_SELECT_INPUT DAISY Register
• XBAR1_IN02_SELECT_INPUT
  XBAR1_IN02_SELECT_INPUT DAISY Register
• XBAR1_IN03_SELECT_INPUT
  XBAR1_IN03_SELECT_INPUT DAISY Register
• XBAR1_IN04_SELECT_INPUT
  XBAR1_IN04_SELECT_INPUT DAISY Register
• XBAR1_IN05_SELECT_INPUT
  XBAR1_IN05_SELECT_INPUT DAISY Register
• XBAR1_IN06_SELECT_INPUT
  XBAR1_IN06_SELECT_INPUT DAISY Register
• XBAR1_IN07_SELECT_INPUT
  XBAR1_IN07_SELECT_INPUT DAISY Register
• XBAR1_IN08_SELECT_INPUT
  XBAR1_IN08_SELECT_INPUT DAISY Register
• XBAR1_IN09_SELECT_INPUT
  XBAR1_IN09_SELECT_INPUT DAISY Register
• XBAR1_IN14_SELECT_INPUT
  XBAR1_IN14_SELECT_INPUT DAISY Register
• XBAR1_IN15_SELECT_INPUT
  XBAR1_IN15_SELECT_INPUT DAISY Register
• XBAR1_IN16_SELECT_INPUT
  XBAR1_IN16_SELECT_INPUT DAISY Register
• XBAR1_IN17_SELECT_INPUT
  XBAR1_IN17_SELECT_INPUT DAISY Register
• XBAR1_IN18_SELECT_INPUT
  XBAR1_IN18_SELECT_INPUT DAISY Register
• XBAR1_IN19_SELECT_INPUT
  XBAR1_IN19_SELECT_INPUT DAISY Register
• XBAR1_IN20_SELECT_INPUT
  XBAR1_IN20_SELECT_INPUT DAISY Register
• XBAR1_IN21_SELECT_INPUT
  XBAR1_IN23_SELECT_INPUT DAISY Register
• XBAR1_IN22_SELECT_INPUT
  XBAR1_IN22_SELECT_INPUT DAISY Register
• XBAR1_IN23_SELECT_INPUT
  XBAR1_IN23_SELECT_INPUT DAISY Register
• XBAR1_IN24_SELECT_INPUT
  XBAR1_IN24_SELECT_INPUT DAISY Register
• XBAR1_IN25_SELECT_INPUT
  XBAR1_IN25_SELECT_INPUT DAISY Register