1
  2
  3
  4
  5
  6
  7
  8
  9
 10
 11
 12
 13
 14
 15
 16
 17
 18
 19
 20
 21
 22
 23
 24
 25
 26
 27
 28
 29
 30
 31
 32
 33
 34
 35
 36
 37
 38
 39
 40
 41
 42
 43
 44
 45
 46
 47
 48
 49
 50
 51
 52
 53
 54
 55
 56
 57
 58
 59
 60
 61
 62
 63
 64
 65
 66
 67
 68
 69
 70
 71
 72
 73
 74
 75
 76
 77
 78
 79
 80
 81
 82
 83
 84
 85
 86
 87
 88
 89
 90
 91
 92
 93
 94
 95
 96
 97
 98
 99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
#[doc = "Reader of register IPRXFCR"]
pub type R = crate::R<u32, super::IPRXFCR>;
#[doc = "Writer for register IPRXFCR"]
pub type W = crate::W<u32, super::IPRXFCR>;
#[doc = "Register IPRXFCR `reset()`'s with value 0"]
impl crate::ResetValue for super::IPRXFCR {
    type Type = u32;
    #[inline(always)]
    fn reset_value() -> Self::Type {
        0
    }
}
#[doc = "Reader of field `CLRIPRXF`"]
pub type CLRIPRXF_R = crate::R<bool, bool>;
#[doc = "Write proxy for field `CLRIPRXF`"]
pub struct CLRIPRXF_W<'a> {
    w: &'a mut W,
}
impl<'a> CLRIPRXF_W<'a> {
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
        self.w
    }
}
#[doc = "IP RX FIFO reading by DMA enabled.\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RXDMAEN_A {
    #[doc = "0: IP RX FIFO would be read by processor."]
    RXDMAEN_0 = 0,
    #[doc = "1: IP RX FIFO would be read by DMA."]
    RXDMAEN_1 = 1,
}
impl From<RXDMAEN_A> for bool {
    #[inline(always)]
    fn from(variant: RXDMAEN_A) -> Self {
        variant as u8 != 0
    }
}
#[doc = "Reader of field `RXDMAEN`"]
pub type RXDMAEN_R = crate::R<bool, RXDMAEN_A>;
impl RXDMAEN_R {
    #[doc = r"Get enumerated values variant"]
    #[inline(always)]
    pub fn variant(&self) -> RXDMAEN_A {
        match self.bits {
            false => RXDMAEN_A::RXDMAEN_0,
            true => RXDMAEN_A::RXDMAEN_1,
        }
    }
    #[doc = "Checks if the value of the field is `RXDMAEN_0`"]
    #[inline(always)]
    pub fn is_rxdmaen_0(&self) -> bool {
        *self == RXDMAEN_A::RXDMAEN_0
    }
    #[doc = "Checks if the value of the field is `RXDMAEN_1`"]
    #[inline(always)]
    pub fn is_rxdmaen_1(&self) -> bool {
        *self == RXDMAEN_A::RXDMAEN_1
    }
}
#[doc = "Write proxy for field `RXDMAEN`"]
pub struct RXDMAEN_W<'a> {
    w: &'a mut W,
}
impl<'a> RXDMAEN_W<'a> {
    #[doc = r"Writes `variant` to the field"]
    #[inline(always)]
    pub fn variant(self, variant: RXDMAEN_A) -> &'a mut W {
        {
            self.bit(variant.into())
        }
    }
    #[doc = "IP RX FIFO would be read by processor."]
    #[inline(always)]
    pub fn rxdmaen_0(self) -> &'a mut W {
        self.variant(RXDMAEN_A::RXDMAEN_0)
    }
    #[doc = "IP RX FIFO would be read by DMA."]
    #[inline(always)]
    pub fn rxdmaen_1(self) -> &'a mut W {
        self.variant(RXDMAEN_A::RXDMAEN_1)
    }
    #[doc = r"Sets the field bit"]
    #[inline(always)]
    pub fn set_bit(self) -> &'a mut W {
        self.bit(true)
    }
    #[doc = r"Clears the field bit"]
    #[inline(always)]
    pub fn clear_bit(self) -> &'a mut W {
        self.bit(false)
    }
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub fn bit(self, value: bool) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
        self.w
    }
}
#[doc = "Reader of field `RXWMRK`"]
pub type RXWMRK_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `RXWMRK`"]
pub struct RXWMRK_W<'a> {
    w: &'a mut W,
}
impl<'a> RXWMRK_W<'a> {
    #[doc = r"Writes raw bits to the field"]
    #[inline(always)]
    pub unsafe fn bits(self, value: u8) -> &'a mut W {
        self.w.bits = (self.w.bits & !(0x0f << 2)) | (((value as u32) & 0x0f) << 2);
        self.w
    }
}
impl R {
    #[doc = "Bit 0 - Clear all valid data entries in IP RX FIFO."]
    #[inline(always)]
    pub fn clriprxf(&self) -> CLRIPRXF_R {
        CLRIPRXF_R::new((self.bits & 0x01) != 0)
    }
    #[doc = "Bit 1 - IP RX FIFO reading by DMA enabled."]
    #[inline(always)]
    pub fn rxdmaen(&self) -> RXDMAEN_R {
        RXDMAEN_R::new(((self.bits >> 1) & 0x01) != 0)
    }
    #[doc = "Bits 2:5 - Watermark level is (RXWMRK+1)*64 Bits."]
    #[inline(always)]
    pub fn rxwmrk(&self) -> RXWMRK_R {
        RXWMRK_R::new(((self.bits >> 2) & 0x0f) as u8)
    }
}
impl W {
    #[doc = "Bit 0 - Clear all valid data entries in IP RX FIFO."]
    #[inline(always)]
    pub fn clriprxf(&mut self) -> CLRIPRXF_W {
        CLRIPRXF_W { w: self }
    }
    #[doc = "Bit 1 - IP RX FIFO reading by DMA enabled."]
    #[inline(always)]
    pub fn rxdmaen(&mut self) -> RXDMAEN_W {
        RXDMAEN_W { w: self }
    }
    #[doc = "Bits 2:5 - Watermark level is (RXWMRK+1)*64 Bits."]
    #[inline(always)]
    pub fn rxwmrk(&mut self) -> RXWMRK_W {
        RXWMRK_W { w: self }
    }
}