[][src]Crate imxrt1062_enet

Modules

atcor

Timer Correction Register

atcr

Adjustable Timer Control Register

atinc

Time-Stamping Clock Period Register

atoff

Timer Offset Register

atper

Timer Period Register

atstmp

Timestamp of Last Transmitted Frame

atvr

Timer Value Register

ecr

Ethernet Control Register

eimr

Interrupt Mask Register

eir

Interrupt Event Register

ftrl

Frame Truncation Length

galr

Descriptor Group Lower Address Register

gaur

Descriptor Group Upper Address Register

ialr

Descriptor Individual Lower Address Register

iaur

Descriptor Individual Upper Address Register

ieee_r_align

Frames Received with Alignment Error Statistic Register

ieee_r_crc

Frames Received with CRC Error Statistic Register

ieee_r_drop

Frames not Counted Correctly Statistic Register

ieee_r_fdxfc

Flow Control Pause Frames Received Statistic Register

ieee_r_frame_ok

Frames Received OK Statistic Register

ieee_r_macerr

Receive FIFO Overflow Count Statistic Register

ieee_r_octets_ok

Octet Count for Frames Received without Error Statistic Register

ieee_t_1col

Frames Transmitted with Single Collision Statistic Register

ieee_t_cserr

Frames Transmitted with Carrier Sense Error Statistic Register

ieee_t_def

Frames Transmitted after Deferral Delay Statistic Register

ieee_t_drop

Reserved Statistic Register

ieee_t_excol

Frames Transmitted with Excessive Collisions Statistic Register

ieee_t_fdxfc

Flow Control Pause Frames Transmitted Statistic Register

ieee_t_frame_ok

Frames Transmitted OK Statistic Register

ieee_t_lcol

Frames Transmitted with Late Collision Statistic Register

ieee_t_macerr

Frames Transmitted with Tx FIFO Underrun Statistic Register

ieee_t_mcol

Frames Transmitted with Multiple Collisions Statistic Register

ieee_t_octets_ok

Octet Count for Frames Transmitted w/o Error Statistic Register

ieee_t_sqe

Reserved Statistic Register

mibc

MIB Control Register

mmfr

MII Management Frame Register

mrbr

Maximum Receive Buffer Size Register

mscr

MII Speed Control Register

opd

Opcode/Pause Duration Register

palr

Physical Address Lower Register

paur

Physical Address Upper Register

racc

Receive Accelerator Function Configuration

raem

Receive FIFO Almost Empty Threshold

rafl

Receive FIFO Almost Full Threshold

rcr

Receive Control Register

rdar

Receive Descriptor Active Register

rdsr

Receive Descriptor Ring Start Register

rmon_r_bc_pkt

Rx Broadcast Packets Statistic Register

rmon_r_crc_align

Rx Packets with CRC/Align Error Statistic Register

rmon_r_frag

Rx Packets Less Than 64 Bytes and Bad CRC Statistic Register

rmon_r_jab

Rx Packets Greater Than MAX_FL Bytes and Bad CRC Statistic Register

rmon_r_mc_pkt

Rx Multicast Packets Statistic Register

rmon_r_octets

Rx Octets Statistic Register

rmon_r_oversize

Rx Packets Greater Than MAX_FL and Good CRC Statistic Register

rmon_r_p64

Rx 64-Byte Packets Statistic Register

rmon_r_p1024to2047

Rx 1024- to 2047-Byte Packets Statistic Register

rmon_r_p128to255

Rx 128- to 255-Byte Packets Statistic Register

rmon_r_p256to511

Rx 256- to 511-Byte Packets Statistic Register

rmon_r_p512to1023

Rx 512- to 1023-Byte Packets Statistic Register

rmon_r_p65to127

Rx 65- to 127-Byte Packets Statistic Register

rmon_r_p_gte2048

Rx Packets Greater than 2048 Bytes Statistic Register

rmon_r_packets

Rx Packet Count Statistic Register

rmon_r_resvd_0

Reserved Statistic Register

rmon_r_undersize

Rx Packets with Less Than 64 Bytes and Good CRC Statistic Register

rmon_t_bc_pkt

Tx Broadcast Packets Statistic Register

rmon_t_col

Tx Collision Count Statistic Register

rmon_t_crc_align

Tx Packets with CRC/Align Error Statistic Register

rmon_t_drop

Reserved Statistic Register

rmon_t_frag

Tx Packets Less Than 64 Bytes and Bad CRC Statistic Register

rmon_t_jab

Tx Packets Greater Than MAX_FL bytes and Bad CRC Statistic Register

rmon_t_mc_pkt

Tx Multicast Packets Statistic Register

rmon_t_octets

Tx Octets Statistic Register

rmon_t_oversize

Tx Packets GT MAX_FL bytes and Good CRC Statistic Register

rmon_t_p64

Tx 64-Byte Packets Statistic Register

rmon_t_p1024to2047

Tx 1024- to 2047-byte Packets Statistic Register

rmon_t_p128to255

Tx 128- to 255-byte Packets Statistic Register

rmon_t_p256to511

Tx 256- to 511-byte Packets Statistic Register

rmon_t_p512to1023

Tx 512- to 1023-byte Packets Statistic Register

rmon_t_p65to127

Tx 65- to 127-byte Packets Statistic Register

rmon_t_p_gte2048

Tx Packets Greater Than 2048 Bytes Statistic Register

rmon_t_packets

Tx Packet Count Statistic Register

rmon_t_undersize

Tx Packets Less Than Bytes and Good CRC Statistic Register

rsem

Receive FIFO Section Empty Threshold

rsfl

Receive FIFO Section Full Threshold

rxic

Receive Interrupt Coalescing Register

tacc

Transmit Accelerator Function Configuration

taem

Transmit FIFO Almost Empty Threshold

tafl

Transmit FIFO Almost Full Threshold

tccr

Timer Compare Capture Register

tcr

Transmit Control Register

tcsr

Timer Control Status Register

tdar

Transmit Descriptor Active Register

tdsr

Transmit Buffer Descriptor Ring Start Register

tfwr

Transmit FIFO Watermark Register

tgsr

Timer Global Status Register

tipg

Transmit Inter-Packet Gap

tsem

Transmit FIFO Section Empty Threshold

txic

Transmit Interrupt Coalescing Register

Structs

R

Register/field reader

Reg

This structure provides volatile access to register

RegisterBlock

Register block

W

Register writer

Enums

Variant

Used if enumerated values cover not the whole range

Traits

Readable

This trait shows that register has read method

ResetValue

Reset value of the register

Writable

This trait shows that register has write, write_with_zero and reset method

Type Definitions

ATCOR

Timer Correction Register

ATCR

Adjustable Timer Control Register

ATINC

Time-Stamping Clock Period Register

ATOFF

Timer Offset Register

ATPER

Timer Period Register

ATSTMP

Timestamp of Last Transmitted Frame

ATVR

Timer Value Register

ECR

Ethernet Control Register

EIMR

Interrupt Mask Register

EIR

Interrupt Event Register

FTRL

Frame Truncation Length

GALR

Descriptor Group Lower Address Register

GAUR

Descriptor Group Upper Address Register

IALR

Descriptor Individual Lower Address Register

IAUR

Descriptor Individual Upper Address Register

IEEE_R_ALIGN

Frames Received with Alignment Error Statistic Register

IEEE_R_CRC

Frames Received with CRC Error Statistic Register

IEEE_R_DROP

Frames not Counted Correctly Statistic Register

IEEE_R_FDXFC

Flow Control Pause Frames Received Statistic Register

IEEE_R_FRAME_OK

Frames Received OK Statistic Register

IEEE_R_MACERR

Receive FIFO Overflow Count Statistic Register

IEEE_R_OCTETS_OK

Octet Count for Frames Received without Error Statistic Register

IEEE_T_1COL

Frames Transmitted with Single Collision Statistic Register

IEEE_T_CSERR

Frames Transmitted with Carrier Sense Error Statistic Register

IEEE_T_DEF

Frames Transmitted after Deferral Delay Statistic Register

IEEE_T_DROP

Reserved Statistic Register

IEEE_T_EXCOL

Frames Transmitted with Excessive Collisions Statistic Register

IEEE_T_FDXFC

Flow Control Pause Frames Transmitted Statistic Register

IEEE_T_FRAME_OK

Frames Transmitted OK Statistic Register

IEEE_T_LCOL

Frames Transmitted with Late Collision Statistic Register

IEEE_T_MACERR

Frames Transmitted with Tx FIFO Underrun Statistic Register

IEEE_T_MCOL

Frames Transmitted with Multiple Collisions Statistic Register

IEEE_T_OCTETS_OK

Octet Count for Frames Transmitted w/o Error Statistic Register

IEEE_T_SQE

Reserved Statistic Register

MIBC

MIB Control Register

MMFR

MII Management Frame Register

MRBR

Maximum Receive Buffer Size Register

MSCR

MII Speed Control Register

OPD

Opcode/Pause Duration Register

PALR

Physical Address Lower Register

PAUR

Physical Address Upper Register

RACC

Receive Accelerator Function Configuration

RAEM

Receive FIFO Almost Empty Threshold

RAFL

Receive FIFO Almost Full Threshold

RCR

Receive Control Register

RDAR

Receive Descriptor Active Register

RDSR

Receive Descriptor Ring Start Register

RMON_R_BC_PKT

Rx Broadcast Packets Statistic Register

RMON_R_CRC_ALIGN

Rx Packets with CRC/Align Error Statistic Register

RMON_R_FRAG

Rx Packets Less Than 64 Bytes and Bad CRC Statistic Register

RMON_R_JAB

Rx Packets Greater Than MAX_FL Bytes and Bad CRC Statistic Register

RMON_R_MC_PKT

Rx Multicast Packets Statistic Register

RMON_R_OCTETS

Rx Octets Statistic Register

RMON_R_OVERSIZE

Rx Packets Greater Than MAX_FL and Good CRC Statistic Register

RMON_R_P64

Rx 64-Byte Packets Statistic Register

RMON_R_P1024TO2047

Rx 1024- to 2047-Byte Packets Statistic Register

RMON_R_P128TO255

Rx 128- to 255-Byte Packets Statistic Register

RMON_R_P256TO511

Rx 256- to 511-Byte Packets Statistic Register

RMON_R_P512TO1023

Rx 512- to 1023-Byte Packets Statistic Register

RMON_R_P65TO127

Rx 65- to 127-Byte Packets Statistic Register

RMON_R_PACKETS

Rx Packet Count Statistic Register

RMON_R_P_GTE2048

Rx Packets Greater than 2048 Bytes Statistic Register

RMON_R_RESVD_0

Reserved Statistic Register

RMON_R_UNDERSIZE

Rx Packets with Less Than 64 Bytes and Good CRC Statistic Register

RMON_T_BC_PKT

Tx Broadcast Packets Statistic Register

RMON_T_COL

Tx Collision Count Statistic Register

RMON_T_CRC_ALIGN

Tx Packets with CRC/Align Error Statistic Register

RMON_T_DROP

Reserved Statistic Register

RMON_T_FRAG

Tx Packets Less Than 64 Bytes and Bad CRC Statistic Register

RMON_T_JAB

Tx Packets Greater Than MAX_FL bytes and Bad CRC Statistic Register

RMON_T_MC_PKT

Tx Multicast Packets Statistic Register

RMON_T_OCTETS

Tx Octets Statistic Register

RMON_T_OVERSIZE

Tx Packets GT MAX_FL bytes and Good CRC Statistic Register

RMON_T_P64

Tx 64-Byte Packets Statistic Register

RMON_T_P1024TO2047

Tx 1024- to 2047-byte Packets Statistic Register

RMON_T_P128TO255

Tx 128- to 255-byte Packets Statistic Register

RMON_T_P256TO511

Tx 256- to 511-byte Packets Statistic Register

RMON_T_P512TO1023

Tx 512- to 1023-byte Packets Statistic Register

RMON_T_P65TO127

Tx 65- to 127-byte Packets Statistic Register

RMON_T_PACKETS

Tx Packet Count Statistic Register

RMON_T_P_GTE2048

Tx Packets Greater Than 2048 Bytes Statistic Register

RMON_T_UNDERSIZE

Tx Packets Less Than Bytes and Good CRC Statistic Register

RSEM

Receive FIFO Section Empty Threshold

RSFL

Receive FIFO Section Full Threshold

RXIC

Receive Interrupt Coalescing Register

TACC

Transmit Accelerator Function Configuration

TAEM

Transmit FIFO Almost Empty Threshold

TAFL

Transmit FIFO Almost Full Threshold

TCCR

Timer Compare Capture Register

TCR

Transmit Control Register

TCSR

Timer Control Status Register

TDAR

Transmit Descriptor Active Register

TDSR

Transmit Buffer Descriptor Ring Start Register

TFWR

Transmit FIFO Watermark Register

TGSR

Timer Global Status Register

TIPG

Transmit Inter-Packet Gap

TSEM

Transmit FIFO Section Empty Threshold

TXIC

Transmit Interrupt Coalescing Register