[−][src]Module imxrt1062_ccm_analog::pll_usb1_tog

Analog USB1 480MHz PLL Control Register

Structs

BYPASS_CLK_SRC_W	Write proxy for field `BYPASS_CLK_SRC`
BYPASS_W	Write proxy for field `BYPASS`
DIV_SELECT_W	Write proxy for field `DIV_SELECT`
ENABLE_W	Write proxy for field `ENABLE`
EN_USB_CLKS_W	Write proxy for field `EN_USB_CLKS`
POWER_W	Write proxy for field `POWER`

Enums

BYPASS_CLK_SRC_A	Determines the bypass source.
EN_USB_CLKS_A	Powers the 9-phase PLL outputs for USBPHYn

Type Definitions

BYPASS_CLK_SRC_R	Reader of field `BYPASS_CLK_SRC`
BYPASS_R	Reader of field `BYPASS`
DIV_SELECT_R	Reader of field `DIV_SELECT`
ENABLE_R	Reader of field `ENABLE`
EN_USB_CLKS_R	Reader of field `EN_USB_CLKS`
LOCK_R	Reader of field `LOCK`
POWER_R	Reader of field `POWER`
R	Reader of register PLL_USB1_TOG
W	Writer for register PLL_USB1_TOG