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Miscellaneous Register 1

Modules

  • This status bit is set to one when when any of the analog regulator brownout interrupts assert
  • This status bit is set to one when when any of the digital regulator brownout interrupts assert
  • This status bit is set to one when the temperature sensor high interrupt asserts for high temperature
  • This status bit is set to one when the temperature sensor low interrupt asserts for low temperature
  • This status bit is set to one when the temperature sensor panic interrupt asserts for a panic high temperature
  • This field selects the clk to be routed to anaclk1/1b.
  • This enables the LVDS input buffer for anaclk1/1b
  • This enables the LVDS output buffer for anaclk1/1b
  • This enables a feature that will clkgate (reset) all PFD_480 clocks anytime the USB1_PLL_480 is unlocked or powered off
  • This enables a feature that will clkgate (reset) all PFD_528 clocks anytime the PLL_528 is unlocked or powered off