Crate imxrt_iomuxc[][src]

Expand description

An interface for defining and configuring i.MX RT pads

imxrt-iomuxc provides traits for defining and configuring i.MX RT processor pads. A ‘pad’ is the physical input / output on an i.MX RT processor. Pads may be configured for various functions. A pad may act as a UART pin, an I2C pin, or other types of pins. A ‘pin’ is a pad that’s configured for a functional purpose. The traits let us say which pad can be used for which peripheral pin.

Developers who write hardware abstraction layers (HALs) for i.MX RT processors may use the imxrt-iomuxc traits in their APIs. HAL implementers may also expose all the processor’s pads for HAL users. The approach lets users treat pads as resources which will be consumed and used by processor peripherals.

Processor pads may be enabled using feature flags. For example, the imxrt106x feature flag exposes an imxrt106x module that defines all i.MX RT 106x processor pads.

Design Guidance

For recommendations on how you can use these traits, see the module-level documentation. The rest of this section describes general guidance for designing APIs with these traits.

Type-Erased Pads

At the expense of requiring unsafe, users may favor type-erased pads over strongly-typed pads. When creating APIs that consume strongly-typed pads, or pads that conform to peripheral pin interfaces, consider supporting an unsafe API to create the peripheral without requiring the strongly-typed pads. The API will expect that the user is responsible for manually configuring the type-erased pad.

use imxrt_iomuxc::{ErasedPad, uart::{Pin, TX, RX}};

impl UART {
    pub fn new<T, R>(mut tx: T, mut rx: R, /* ... */) -> UART
    where
        T: Pin<Direction = TX>,
        R: Pin<Direction = RX, Module = <T as Pin>::Module>,
    {
        imxrt_iomuxc::uart::prepare(&mut tx);
        imxrt_iomuxc::uart::prepare(&mut rx);
        // ...
    }

    pub unsafe fn new_unchecked(tx: ErasedPad, rx: ErasedPad, /* ... */) -> UART {
        // ...
    }
}

// Preferred: create a UART peripheral with strongly-typed pads...
let ad_b0_03 = unsafe { AD_B0_03::new() };
let ad_b0_04 = unsafe { AD_B0_04::new() };
let uart1 = UART::new(ad_b0_03, ad_b0_04);

// Optional: create a UART peripheral from type-erased pads...
let ad_b0_03 = unsafe { AD_B0_03::new() };
let ad_b0_04 = unsafe { AD_B0_04::new() };

let mut tx_pad = ad_b0_03.erase();
let mut rx_pad = ad_b0_04.erase();

// User is responsible for configuring the pad,
// since we can't call `prepare()` on the pad...
unsafe {
    // Daisy registers and values aren't attached
    // to erased pads, so we have to reference this
    // manually.
    <AD_B0_03 as imxrt_iomuxc::uart::Pin>::DAISY.map(|daisy| daisy.write());
    <AD_B0_04 as imxrt_iomuxc::uart::Pin>::DAISY.map(|daisy| daisy.write());
}
imxrt_iomuxc::alternate(&mut tx_pad, 2);
imxrt_iomuxc::alternate(&mut rx_pad, 2);
imxrt_iomuxc::clear_sion(&mut tx_pad);
imxrt_iomuxc::clear_sion(&mut rx_pad);
// Pads are configured for UART settings
let uart1 = unsafe { UART::new_unchecked(tx_pad, rx_pad) };

Modules

ADC pad configuration

Type-level constants and traits

GPIO pad configuration

I2C pad configuration

imxrt106ximxrt106x

Pads for the i.MX RT 106x processor family

Re-export of top-level components, without the chip-specific modules.

PWM pad configuration

SAI / I2S pad configurations

SPI pad configurations

UART pad configuration

Structs

A configuration capable of compile-time, const configuration:

A daisy selection

A pad that has its type erased

An i.MXT RT pad

An error that indicates the conversion from an ErasedPad to a strongly-typed pad failed.

Enums

Drive strength

The hysteresis (HYS) bit controls whether a pin acts as a Schmitt trigger, which is a comparator remembering its last input state (hysteresis).

Open Drain Enable Field

Enable or disable the pull / keeper functionality

Control signal to enable internal pull-up/down resistors or pad keeper functionality.

The pull up, pull down, or keeper configuration.

Controls signals to select pull-up or pull-down internal resistance strength.

Slew Rate

Sets electrical characteristics of a pin in a given frequency range

Traits

An IOMUXC-capable pad which can support I/O multiplexing

Functions

Set an alternate value for the pad

Clear the SION bit in a pad’s MUX register

Applies the configuration config for the supplied pad

Set the SION bit in a pad’s MUX register