use super::iced_constants::IcedConstants;
use core::fmt;
use core::mem;
use core::ops::{Add, AddAssign, Sub, SubAssign};
#[cfg(feature = "instr_info")]
pub use self::info::*;
#[cfg(feature = "instr_info")]
mod info {
use super::super::iced_constants::IcedConstants;
use super::Register;
use core::mem;
#[cfg_attr(feature = "cargo-fmt", rustfmt::skip)]
pub(super) static REGISTER_INFOS: &[RegisterInfo; IcedConstants::NUMBER_OF_REGISTERS] = &[
RegisterInfo { register: Register::None, base: Register::None, full_register: Register::None, size: 0 },
RegisterInfo { register: Register::AL, base: Register::AL, full_register: Register::RAX, size: 1 },
RegisterInfo { register: Register::CL, base: Register::AL, full_register: Register::RCX, size: 1 },
RegisterInfo { register: Register::DL, base: Register::AL, full_register: Register::RDX, size: 1 },
RegisterInfo { register: Register::BL, base: Register::AL, full_register: Register::RBX, size: 1 },
RegisterInfo { register: Register::AH, base: Register::AL, full_register: Register::RAX, size: 1 },
RegisterInfo { register: Register::CH, base: Register::AL, full_register: Register::RCX, size: 1 },
RegisterInfo { register: Register::DH, base: Register::AL, full_register: Register::RDX, size: 1 },
RegisterInfo { register: Register::BH, base: Register::AL, full_register: Register::RBX, size: 1 },
RegisterInfo { register: Register::SPL, base: Register::AL, full_register: Register::RSP, size: 1 },
RegisterInfo { register: Register::BPL, base: Register::AL, full_register: Register::RBP, size: 1 },
RegisterInfo { register: Register::SIL, base: Register::AL, full_register: Register::RSI, size: 1 },
RegisterInfo { register: Register::DIL, base: Register::AL, full_register: Register::RDI, size: 1 },
RegisterInfo { register: Register::R8L, base: Register::AL, full_register: Register::R8, size: 1 },
RegisterInfo { register: Register::R9L, base: Register::AL, full_register: Register::R9, size: 1 },
RegisterInfo { register: Register::R10L, base: Register::AL, full_register: Register::R10, size: 1 },
RegisterInfo { register: Register::R11L, base: Register::AL, full_register: Register::R11, size: 1 },
RegisterInfo { register: Register::R12L, base: Register::AL, full_register: Register::R12, size: 1 },
RegisterInfo { register: Register::R13L, base: Register::AL, full_register: Register::R13, size: 1 },
RegisterInfo { register: Register::R14L, base: Register::AL, full_register: Register::R14, size: 1 },
RegisterInfo { register: Register::R15L, base: Register::AL, full_register: Register::R15, size: 1 },
RegisterInfo { register: Register::AX, base: Register::AX, full_register: Register::RAX, size: 2 },
RegisterInfo { register: Register::CX, base: Register::AX, full_register: Register::RCX, size: 2 },
RegisterInfo { register: Register::DX, base: Register::AX, full_register: Register::RDX, size: 2 },
RegisterInfo { register: Register::BX, base: Register::AX, full_register: Register::RBX, size: 2 },
RegisterInfo { register: Register::SP, base: Register::AX, full_register: Register::RSP, size: 2 },
RegisterInfo { register: Register::BP, base: Register::AX, full_register: Register::RBP, size: 2 },
RegisterInfo { register: Register::SI, base: Register::AX, full_register: Register::RSI, size: 2 },
RegisterInfo { register: Register::DI, base: Register::AX, full_register: Register::RDI, size: 2 },
RegisterInfo { register: Register::R8W, base: Register::AX, full_register: Register::R8, size: 2 },
RegisterInfo { register: Register::R9W, base: Register::AX, full_register: Register::R9, size: 2 },
RegisterInfo { register: Register::R10W, base: Register::AX, full_register: Register::R10, size: 2 },
RegisterInfo { register: Register::R11W, base: Register::AX, full_register: Register::R11, size: 2 },
RegisterInfo { register: Register::R12W, base: Register::AX, full_register: Register::R12, size: 2 },
RegisterInfo { register: Register::R13W, base: Register::AX, full_register: Register::R13, size: 2 },
RegisterInfo { register: Register::R14W, base: Register::AX, full_register: Register::R14, size: 2 },
RegisterInfo { register: Register::R15W, base: Register::AX, full_register: Register::R15, size: 2 },
RegisterInfo { register: Register::EAX, base: Register::EAX, full_register: Register::RAX, size: 4 },
RegisterInfo { register: Register::ECX, base: Register::EAX, full_register: Register::RCX, size: 4 },
RegisterInfo { register: Register::EDX, base: Register::EAX, full_register: Register::RDX, size: 4 },
RegisterInfo { register: Register::EBX, base: Register::EAX, full_register: Register::RBX, size: 4 },
RegisterInfo { register: Register::ESP, base: Register::EAX, full_register: Register::RSP, size: 4 },
RegisterInfo { register: Register::EBP, base: Register::EAX, full_register: Register::RBP, size: 4 },
RegisterInfo { register: Register::ESI, base: Register::EAX, full_register: Register::RSI, size: 4 },
RegisterInfo { register: Register::EDI, base: Register::EAX, full_register: Register::RDI, size: 4 },
RegisterInfo { register: Register::R8D, base: Register::EAX, full_register: Register::R8, size: 4 },
RegisterInfo { register: Register::R9D, base: Register::EAX, full_register: Register::R9, size: 4 },
RegisterInfo { register: Register::R10D, base: Register::EAX, full_register: Register::R10, size: 4 },
RegisterInfo { register: Register::R11D, base: Register::EAX, full_register: Register::R11, size: 4 },
RegisterInfo { register: Register::R12D, base: Register::EAX, full_register: Register::R12, size: 4 },
RegisterInfo { register: Register::R13D, base: Register::EAX, full_register: Register::R13, size: 4 },
RegisterInfo { register: Register::R14D, base: Register::EAX, full_register: Register::R14, size: 4 },
RegisterInfo { register: Register::R15D, base: Register::EAX, full_register: Register::R15, size: 4 },
RegisterInfo { register: Register::RAX, base: Register::RAX, full_register: Register::RAX, size: 8 },
RegisterInfo { register: Register::RCX, base: Register::RAX, full_register: Register::RCX, size: 8 },
RegisterInfo { register: Register::RDX, base: Register::RAX, full_register: Register::RDX, size: 8 },
RegisterInfo { register: Register::RBX, base: Register::RAX, full_register: Register::RBX, size: 8 },
RegisterInfo { register: Register::RSP, base: Register::RAX, full_register: Register::RSP, size: 8 },
RegisterInfo { register: Register::RBP, base: Register::RAX, full_register: Register::RBP, size: 8 },
RegisterInfo { register: Register::RSI, base: Register::RAX, full_register: Register::RSI, size: 8 },
RegisterInfo { register: Register::RDI, base: Register::RAX, full_register: Register::RDI, size: 8 },
RegisterInfo { register: Register::R8, base: Register::RAX, full_register: Register::R8, size: 8 },
RegisterInfo { register: Register::R9, base: Register::RAX, full_register: Register::R9, size: 8 },
RegisterInfo { register: Register::R10, base: Register::RAX, full_register: Register::R10, size: 8 },
RegisterInfo { register: Register::R11, base: Register::RAX, full_register: Register::R11, size: 8 },
RegisterInfo { register: Register::R12, base: Register::RAX, full_register: Register::R12, size: 8 },
RegisterInfo { register: Register::R13, base: Register::RAX, full_register: Register::R13, size: 8 },
RegisterInfo { register: Register::R14, base: Register::RAX, full_register: Register::R14, size: 8 },
RegisterInfo { register: Register::R15, base: Register::RAX, full_register: Register::R15, size: 8 },
RegisterInfo { register: Register::EIP, base: Register::EIP, full_register: Register::RIP, size: 4 },
RegisterInfo { register: Register::RIP, base: Register::EIP, full_register: Register::RIP, size: 8 },
RegisterInfo { register: Register::ES, base: Register::ES, full_register: Register::ES, size: 2 },
RegisterInfo { register: Register::CS, base: Register::ES, full_register: Register::CS, size: 2 },
RegisterInfo { register: Register::SS, base: Register::ES, full_register: Register::SS, size: 2 },
RegisterInfo { register: Register::DS, base: Register::ES, full_register: Register::DS, size: 2 },
RegisterInfo { register: Register::FS, base: Register::ES, full_register: Register::FS, size: 2 },
RegisterInfo { register: Register::GS, base: Register::ES, full_register: Register::GS, size: 2 },
RegisterInfo { register: Register::XMM0, base: Register::XMM0, full_register: Register::ZMM0, size: 16 },
RegisterInfo { register: Register::XMM1, base: Register::XMM0, full_register: Register::ZMM1, size: 16 },
RegisterInfo { register: Register::XMM2, base: Register::XMM0, full_register: Register::ZMM2, size: 16 },
RegisterInfo { register: Register::XMM3, base: Register::XMM0, full_register: Register::ZMM3, size: 16 },
RegisterInfo { register: Register::XMM4, base: Register::XMM0, full_register: Register::ZMM4, size: 16 },
RegisterInfo { register: Register::XMM5, base: Register::XMM0, full_register: Register::ZMM5, size: 16 },
RegisterInfo { register: Register::XMM6, base: Register::XMM0, full_register: Register::ZMM6, size: 16 },
RegisterInfo { register: Register::XMM7, base: Register::XMM0, full_register: Register::ZMM7, size: 16 },
RegisterInfo { register: Register::XMM8, base: Register::XMM0, full_register: Register::ZMM8, size: 16 },
RegisterInfo { register: Register::XMM9, base: Register::XMM0, full_register: Register::ZMM9, size: 16 },
RegisterInfo { register: Register::XMM10, base: Register::XMM0, full_register: Register::ZMM10, size: 16 },
RegisterInfo { register: Register::XMM11, base: Register::XMM0, full_register: Register::ZMM11, size: 16 },
RegisterInfo { register: Register::XMM12, base: Register::XMM0, full_register: Register::ZMM12, size: 16 },
RegisterInfo { register: Register::XMM13, base: Register::XMM0, full_register: Register::ZMM13, size: 16 },
RegisterInfo { register: Register::XMM14, base: Register::XMM0, full_register: Register::ZMM14, size: 16 },
RegisterInfo { register: Register::XMM15, base: Register::XMM0, full_register: Register::ZMM15, size: 16 },
RegisterInfo { register: Register::XMM16, base: Register::XMM0, full_register: Register::ZMM16, size: 16 },
RegisterInfo { register: Register::XMM17, base: Register::XMM0, full_register: Register::ZMM17, size: 16 },
RegisterInfo { register: Register::XMM18, base: Register::XMM0, full_register: Register::ZMM18, size: 16 },
RegisterInfo { register: Register::XMM19, base: Register::XMM0, full_register: Register::ZMM19, size: 16 },
RegisterInfo { register: Register::XMM20, base: Register::XMM0, full_register: Register::ZMM20, size: 16 },
RegisterInfo { register: Register::XMM21, base: Register::XMM0, full_register: Register::ZMM21, size: 16 },
RegisterInfo { register: Register::XMM22, base: Register::XMM0, full_register: Register::ZMM22, size: 16 },
RegisterInfo { register: Register::XMM23, base: Register::XMM0, full_register: Register::ZMM23, size: 16 },
RegisterInfo { register: Register::XMM24, base: Register::XMM0, full_register: Register::ZMM24, size: 16 },
RegisterInfo { register: Register::XMM25, base: Register::XMM0, full_register: Register::ZMM25, size: 16 },
RegisterInfo { register: Register::XMM26, base: Register::XMM0, full_register: Register::ZMM26, size: 16 },
RegisterInfo { register: Register::XMM27, base: Register::XMM0, full_register: Register::ZMM27, size: 16 },
RegisterInfo { register: Register::XMM28, base: Register::XMM0, full_register: Register::ZMM28, size: 16 },
RegisterInfo { register: Register::XMM29, base: Register::XMM0, full_register: Register::ZMM29, size: 16 },
RegisterInfo { register: Register::XMM30, base: Register::XMM0, full_register: Register::ZMM30, size: 16 },
RegisterInfo { register: Register::XMM31, base: Register::XMM0, full_register: Register::ZMM31, size: 16 },
RegisterInfo { register: Register::YMM0, base: Register::YMM0, full_register: Register::ZMM0, size: 32 },
RegisterInfo { register: Register::YMM1, base: Register::YMM0, full_register: Register::ZMM1, size: 32 },
RegisterInfo { register: Register::YMM2, base: Register::YMM0, full_register: Register::ZMM2, size: 32 },
RegisterInfo { register: Register::YMM3, base: Register::YMM0, full_register: Register::ZMM3, size: 32 },
RegisterInfo { register: Register::YMM4, base: Register::YMM0, full_register: Register::ZMM4, size: 32 },
RegisterInfo { register: Register::YMM5, base: Register::YMM0, full_register: Register::ZMM5, size: 32 },
RegisterInfo { register: Register::YMM6, base: Register::YMM0, full_register: Register::ZMM6, size: 32 },
RegisterInfo { register: Register::YMM7, base: Register::YMM0, full_register: Register::ZMM7, size: 32 },
RegisterInfo { register: Register::YMM8, base: Register::YMM0, full_register: Register::ZMM8, size: 32 },
RegisterInfo { register: Register::YMM9, base: Register::YMM0, full_register: Register::ZMM9, size: 32 },
RegisterInfo { register: Register::YMM10, base: Register::YMM0, full_register: Register::ZMM10, size: 32 },
RegisterInfo { register: Register::YMM11, base: Register::YMM0, full_register: Register::ZMM11, size: 32 },
RegisterInfo { register: Register::YMM12, base: Register::YMM0, full_register: Register::ZMM12, size: 32 },
RegisterInfo { register: Register::YMM13, base: Register::YMM0, full_register: Register::ZMM13, size: 32 },
RegisterInfo { register: Register::YMM14, base: Register::YMM0, full_register: Register::ZMM14, size: 32 },
RegisterInfo { register: Register::YMM15, base: Register::YMM0, full_register: Register::ZMM15, size: 32 },
RegisterInfo { register: Register::YMM16, base: Register::YMM0, full_register: Register::ZMM16, size: 32 },
RegisterInfo { register: Register::YMM17, base: Register::YMM0, full_register: Register::ZMM17, size: 32 },
RegisterInfo { register: Register::YMM18, base: Register::YMM0, full_register: Register::ZMM18, size: 32 },
RegisterInfo { register: Register::YMM19, base: Register::YMM0, full_register: Register::ZMM19, size: 32 },
RegisterInfo { register: Register::YMM20, base: Register::YMM0, full_register: Register::ZMM20, size: 32 },
RegisterInfo { register: Register::YMM21, base: Register::YMM0, full_register: Register::ZMM21, size: 32 },
RegisterInfo { register: Register::YMM22, base: Register::YMM0, full_register: Register::ZMM22, size: 32 },
RegisterInfo { register: Register::YMM23, base: Register::YMM0, full_register: Register::ZMM23, size: 32 },
RegisterInfo { register: Register::YMM24, base: Register::YMM0, full_register: Register::ZMM24, size: 32 },
RegisterInfo { register: Register::YMM25, base: Register::YMM0, full_register: Register::ZMM25, size: 32 },
RegisterInfo { register: Register::YMM26, base: Register::YMM0, full_register: Register::ZMM26, size: 32 },
RegisterInfo { register: Register::YMM27, base: Register::YMM0, full_register: Register::ZMM27, size: 32 },
RegisterInfo { register: Register::YMM28, base: Register::YMM0, full_register: Register::ZMM28, size: 32 },
RegisterInfo { register: Register::YMM29, base: Register::YMM0, full_register: Register::ZMM29, size: 32 },
RegisterInfo { register: Register::YMM30, base: Register::YMM0, full_register: Register::ZMM30, size: 32 },
RegisterInfo { register: Register::YMM31, base: Register::YMM0, full_register: Register::ZMM31, size: 32 },
RegisterInfo { register: Register::ZMM0, base: Register::ZMM0, full_register: Register::ZMM0, size: 64 },
RegisterInfo { register: Register::ZMM1, base: Register::ZMM0, full_register: Register::ZMM1, size: 64 },
RegisterInfo { register: Register::ZMM2, base: Register::ZMM0, full_register: Register::ZMM2, size: 64 },
RegisterInfo { register: Register::ZMM3, base: Register::ZMM0, full_register: Register::ZMM3, size: 64 },
RegisterInfo { register: Register::ZMM4, base: Register::ZMM0, full_register: Register::ZMM4, size: 64 },
RegisterInfo { register: Register::ZMM5, base: Register::ZMM0, full_register: Register::ZMM5, size: 64 },
RegisterInfo { register: Register::ZMM6, base: Register::ZMM0, full_register: Register::ZMM6, size: 64 },
RegisterInfo { register: Register::ZMM7, base: Register::ZMM0, full_register: Register::ZMM7, size: 64 },
RegisterInfo { register: Register::ZMM8, base: Register::ZMM0, full_register: Register::ZMM8, size: 64 },
RegisterInfo { register: Register::ZMM9, base: Register::ZMM0, full_register: Register::ZMM9, size: 64 },
RegisterInfo { register: Register::ZMM10, base: Register::ZMM0, full_register: Register::ZMM10, size: 64 },
RegisterInfo { register: Register::ZMM11, base: Register::ZMM0, full_register: Register::ZMM11, size: 64 },
RegisterInfo { register: Register::ZMM12, base: Register::ZMM0, full_register: Register::ZMM12, size: 64 },
RegisterInfo { register: Register::ZMM13, base: Register::ZMM0, full_register: Register::ZMM13, size: 64 },
RegisterInfo { register: Register::ZMM14, base: Register::ZMM0, full_register: Register::ZMM14, size: 64 },
RegisterInfo { register: Register::ZMM15, base: Register::ZMM0, full_register: Register::ZMM15, size: 64 },
RegisterInfo { register: Register::ZMM16, base: Register::ZMM0, full_register: Register::ZMM16, size: 64 },
RegisterInfo { register: Register::ZMM17, base: Register::ZMM0, full_register: Register::ZMM17, size: 64 },
RegisterInfo { register: Register::ZMM18, base: Register::ZMM0, full_register: Register::ZMM18, size: 64 },
RegisterInfo { register: Register::ZMM19, base: Register::ZMM0, full_register: Register::ZMM19, size: 64 },
RegisterInfo { register: Register::ZMM20, base: Register::ZMM0, full_register: Register::ZMM20, size: 64 },
RegisterInfo { register: Register::ZMM21, base: Register::ZMM0, full_register: Register::ZMM21, size: 64 },
RegisterInfo { register: Register::ZMM22, base: Register::ZMM0, full_register: Register::ZMM22, size: 64 },
RegisterInfo { register: Register::ZMM23, base: Register::ZMM0, full_register: Register::ZMM23, size: 64 },
RegisterInfo { register: Register::ZMM24, base: Register::ZMM0, full_register: Register::ZMM24, size: 64 },
RegisterInfo { register: Register::ZMM25, base: Register::ZMM0, full_register: Register::ZMM25, size: 64 },
RegisterInfo { register: Register::ZMM26, base: Register::ZMM0, full_register: Register::ZMM26, size: 64 },
RegisterInfo { register: Register::ZMM27, base: Register::ZMM0, full_register: Register::ZMM27, size: 64 },
RegisterInfo { register: Register::ZMM28, base: Register::ZMM0, full_register: Register::ZMM28, size: 64 },
RegisterInfo { register: Register::ZMM29, base: Register::ZMM0, full_register: Register::ZMM29, size: 64 },
RegisterInfo { register: Register::ZMM30, base: Register::ZMM0, full_register: Register::ZMM30, size: 64 },
RegisterInfo { register: Register::ZMM31, base: Register::ZMM0, full_register: Register::ZMM31, size: 64 },
RegisterInfo { register: Register::K0, base: Register::K0, full_register: Register::K0, size: 8 },
RegisterInfo { register: Register::K1, base: Register::K0, full_register: Register::K1, size: 8 },
RegisterInfo { register: Register::K2, base: Register::K0, full_register: Register::K2, size: 8 },
RegisterInfo { register: Register::K3, base: Register::K0, full_register: Register::K3, size: 8 },
RegisterInfo { register: Register::K4, base: Register::K0, full_register: Register::K4, size: 8 },
RegisterInfo { register: Register::K5, base: Register::K0, full_register: Register::K5, size: 8 },
RegisterInfo { register: Register::K6, base: Register::K0, full_register: Register::K6, size: 8 },
RegisterInfo { register: Register::K7, base: Register::K0, full_register: Register::K7, size: 8 },
RegisterInfo { register: Register::BND0, base: Register::BND0, full_register: Register::BND0, size: 16 },
RegisterInfo { register: Register::BND1, base: Register::BND0, full_register: Register::BND1, size: 16 },
RegisterInfo { register: Register::BND2, base: Register::BND0, full_register: Register::BND2, size: 16 },
RegisterInfo { register: Register::BND3, base: Register::BND0, full_register: Register::BND3, size: 16 },
RegisterInfo { register: Register::CR0, base: Register::CR0, full_register: Register::CR0, size: 8 },
RegisterInfo { register: Register::CR1, base: Register::CR0, full_register: Register::CR1, size: 8 },
RegisterInfo { register: Register::CR2, base: Register::CR0, full_register: Register::CR2, size: 8 },
RegisterInfo { register: Register::CR3, base: Register::CR0, full_register: Register::CR3, size: 8 },
RegisterInfo { register: Register::CR4, base: Register::CR0, full_register: Register::CR4, size: 8 },
RegisterInfo { register: Register::CR5, base: Register::CR0, full_register: Register::CR5, size: 8 },
RegisterInfo { register: Register::CR6, base: Register::CR0, full_register: Register::CR6, size: 8 },
RegisterInfo { register: Register::CR7, base: Register::CR0, full_register: Register::CR7, size: 8 },
RegisterInfo { register: Register::CR8, base: Register::CR0, full_register: Register::CR8, size: 8 },
RegisterInfo { register: Register::CR9, base: Register::CR0, full_register: Register::CR9, size: 8 },
RegisterInfo { register: Register::CR10, base: Register::CR0, full_register: Register::CR10, size: 8 },
RegisterInfo { register: Register::CR11, base: Register::CR0, full_register: Register::CR11, size: 8 },
RegisterInfo { register: Register::CR12, base: Register::CR0, full_register: Register::CR12, size: 8 },
RegisterInfo { register: Register::CR13, base: Register::CR0, full_register: Register::CR13, size: 8 },
RegisterInfo { register: Register::CR14, base: Register::CR0, full_register: Register::CR14, size: 8 },
RegisterInfo { register: Register::CR15, base: Register::CR0, full_register: Register::CR15, size: 8 },
RegisterInfo { register: Register::DR0, base: Register::DR0, full_register: Register::DR0, size: 8 },
RegisterInfo { register: Register::DR1, base: Register::DR0, full_register: Register::DR1, size: 8 },
RegisterInfo { register: Register::DR2, base: Register::DR0, full_register: Register::DR2, size: 8 },
RegisterInfo { register: Register::DR3, base: Register::DR0, full_register: Register::DR3, size: 8 },
RegisterInfo { register: Register::DR4, base: Register::DR0, full_register: Register::DR4, size: 8 },
RegisterInfo { register: Register::DR5, base: Register::DR0, full_register: Register::DR5, size: 8 },
RegisterInfo { register: Register::DR6, base: Register::DR0, full_register: Register::DR6, size: 8 },
RegisterInfo { register: Register::DR7, base: Register::DR0, full_register: Register::DR7, size: 8 },
RegisterInfo { register: Register::DR8, base: Register::DR0, full_register: Register::DR8, size: 8 },
RegisterInfo { register: Register::DR9, base: Register::DR0, full_register: Register::DR9, size: 8 },
RegisterInfo { register: Register::DR10, base: Register::DR0, full_register: Register::DR10, size: 8 },
RegisterInfo { register: Register::DR11, base: Register::DR0, full_register: Register::DR11, size: 8 },
RegisterInfo { register: Register::DR12, base: Register::DR0, full_register: Register::DR12, size: 8 },
RegisterInfo { register: Register::DR13, base: Register::DR0, full_register: Register::DR13, size: 8 },
RegisterInfo { register: Register::DR14, base: Register::DR0, full_register: Register::DR14, size: 8 },
RegisterInfo { register: Register::DR15, base: Register::DR0, full_register: Register::DR15, size: 8 },
RegisterInfo { register: Register::ST0, base: Register::ST0, full_register: Register::ST0, size: 10 },
RegisterInfo { register: Register::ST1, base: Register::ST0, full_register: Register::ST1, size: 10 },
RegisterInfo { register: Register::ST2, base: Register::ST0, full_register: Register::ST2, size: 10 },
RegisterInfo { register: Register::ST3, base: Register::ST0, full_register: Register::ST3, size: 10 },
RegisterInfo { register: Register::ST4, base: Register::ST0, full_register: Register::ST4, size: 10 },
RegisterInfo { register: Register::ST5, base: Register::ST0, full_register: Register::ST5, size: 10 },
RegisterInfo { register: Register::ST6, base: Register::ST0, full_register: Register::ST6, size: 10 },
RegisterInfo { register: Register::ST7, base: Register::ST0, full_register: Register::ST7, size: 10 },
RegisterInfo { register: Register::MM0, base: Register::MM0, full_register: Register::MM0, size: 8 },
RegisterInfo { register: Register::MM1, base: Register::MM0, full_register: Register::MM1, size: 8 },
RegisterInfo { register: Register::MM2, base: Register::MM0, full_register: Register::MM2, size: 8 },
RegisterInfo { register: Register::MM3, base: Register::MM0, full_register: Register::MM3, size: 8 },
RegisterInfo { register: Register::MM4, base: Register::MM0, full_register: Register::MM4, size: 8 },
RegisterInfo { register: Register::MM5, base: Register::MM0, full_register: Register::MM5, size: 8 },
RegisterInfo { register: Register::MM6, base: Register::MM0, full_register: Register::MM6, size: 8 },
RegisterInfo { register: Register::MM7, base: Register::MM0, full_register: Register::MM7, size: 8 },
RegisterInfo { register: Register::TR0, base: Register::TR0, full_register: Register::TR0, size: 4 },
RegisterInfo { register: Register::TR1, base: Register::TR0, full_register: Register::TR1, size: 4 },
RegisterInfo { register: Register::TR2, base: Register::TR0, full_register: Register::TR2, size: 4 },
RegisterInfo { register: Register::TR3, base: Register::TR0, full_register: Register::TR3, size: 4 },
RegisterInfo { register: Register::TR4, base: Register::TR0, full_register: Register::TR4, size: 4 },
RegisterInfo { register: Register::TR5, base: Register::TR0, full_register: Register::TR5, size: 4 },
RegisterInfo { register: Register::TR6, base: Register::TR0, full_register: Register::TR6, size: 4 },
RegisterInfo { register: Register::TR7, base: Register::TR0, full_register: Register::TR7, size: 4 },
];
#[derive(Debug, Copy, Clone, Eq, PartialEq, Hash)]
pub struct RegisterInfo {
register: Register,
base: Register,
full_register: Register,
size: u8,
}
#[cfg_attr(feature = "cargo-clippy", allow(clippy::trivially_copy_pass_by_ref))]
impl RegisterInfo {
#[cfg_attr(has_must_use, must_use)]
#[inline]
pub fn register(&self) -> Register {
self.register
}
#[cfg_attr(has_must_use, must_use)]
#[inline]
pub fn base(&self) -> Register {
self.base
}
#[cfg_attr(has_must_use, must_use)]
#[inline]
pub fn number(&self) -> usize {
self.register as usize - self.base as usize
}
#[cfg_attr(has_must_use, must_use)]
#[inline]
pub fn full_register(&self) -> Register {
self.full_register
}
#[cfg_attr(has_must_use, must_use)]
#[inline]
pub fn full_register32(&self) -> Register {
let full_register = self.full_register;
if full_register.is_gpr() {
debug_assert!(Register::RAX <= full_register && full_register <= Register::R15);
unsafe { mem::transmute(full_register as u8 - Register::RAX as u8 + Register::EAX as u8) }
} else {
full_register
}
}
#[cfg_attr(has_must_use, must_use)]
#[inline]
pub fn size(&self) -> usize {
self.size as usize
}
}
}
#[cfg(feature = "instr_info")]
impl Register {
#[cfg_attr(has_must_use, must_use)]
#[inline]
pub fn info(self) -> &'static RegisterInfo {
®ISTER_INFOS[self as usize]
}
#[cfg_attr(has_must_use, must_use)]
#[inline]
pub fn base(self) -> Self {
self.info().base()
}
#[cfg_attr(has_must_use, must_use)]
#[inline]
pub fn number(self) -> usize {
self.info().number()
}
#[cfg_attr(has_must_use, must_use)]
#[inline]
pub fn full_register(self) -> Self {
self.info().full_register()
}
#[cfg_attr(has_must_use, must_use)]
#[inline]
pub fn full_register32(self) -> Self {
self.info().full_register32()
}
#[cfg_attr(has_must_use, must_use)]
#[inline]
pub fn size(self) -> usize {
self.info().size()
}
}
#[cfg(any(feature = "instr_info", feature = "encoder"))]
impl Register {
#[cfg_attr(has_must_use, must_use)]
#[inline]
pub fn is_segment_register(self) -> bool {
Register::ES <= self && self <= Register::GS
}
#[cfg_attr(has_must_use, must_use)]
#[inline]
pub fn is_gpr(self) -> bool {
Register::AL <= self && self <= Register::R15
}
#[cfg_attr(has_must_use, must_use)]
#[inline]
pub fn is_gpr8(self) -> bool {
Register::AL <= self && self <= Register::R15L
}
#[cfg_attr(has_must_use, must_use)]
#[inline]
pub fn is_gpr16(self) -> bool {
Register::AX <= self && self <= Register::R15W
}
#[cfg_attr(has_must_use, must_use)]
#[inline]
pub fn is_gpr32(self) -> bool {
Register::EAX <= self && self <= Register::R15D
}
#[cfg_attr(has_must_use, must_use)]
#[inline]
pub fn is_gpr64(self) -> bool {
Register::RAX <= self && self <= Register::R15
}
#[cfg_attr(has_must_use, must_use)]
#[inline]
pub fn is_xmm(self) -> bool {
Register::XMM0 <= self && self <= IcedConstants::XMM_LAST
}
#[cfg_attr(has_must_use, must_use)]
#[inline]
pub fn is_ymm(self) -> bool {
Register::YMM0 <= self && self <= IcedConstants::YMM_LAST
}
#[cfg_attr(has_must_use, must_use)]
#[inline]
pub fn is_zmm(self) -> bool {
Register::ZMM0 <= self && self <= IcedConstants::ZMM_LAST
}
#[cfg_attr(has_must_use, must_use)]
#[inline]
pub fn is_vector_register(self) -> bool {
Register::XMM0 <= self && self <= IcedConstants::VMM_LAST
}
#[cfg_attr(has_must_use, must_use)]
#[inline]
pub fn is_ip(self) -> bool {
self == Register::EIP || self == Register::RIP
}
#[cfg_attr(has_must_use, must_use)]
#[inline]
pub fn is_k(self) -> bool {
Register::K0 <= self && self <= Register::K7
}
#[cfg_attr(has_must_use, must_use)]
#[inline]
pub fn is_cr(self) -> bool {
Register::CR0 <= self && self <= Register::CR15
}
#[cfg_attr(has_must_use, must_use)]
#[inline]
pub fn is_dr(self) -> bool {
Register::DR0 <= self && self <= Register::DR15
}
#[cfg_attr(has_must_use, must_use)]
#[inline]
pub fn is_tr(self) -> bool {
Register::TR0 <= self && self <= Register::TR7
}
#[cfg_attr(has_must_use, must_use)]
#[inline]
pub fn is_st(self) -> bool {
Register::ST0 <= self && self <= Register::ST7
}
#[cfg_attr(has_must_use, must_use)]
#[inline]
pub fn is_bnd(self) -> bool {
Register::BND0 <= self && self <= Register::BND3
}
#[cfg_attr(has_must_use, must_use)]
#[inline]
pub fn is_mm(self) -> bool {
Register::MM0 <= self && self <= Register::MM7
}
}
#[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd, Hash)]
#[cfg_attr(all(not(feature = "exhaustive_enums"), has_non_exhaustive), non_exhaustive)]
#[allow(missing_docs)]
pub enum Register {
None,
AL,
CL,
DL,
BL,
AH,
CH,
DH,
BH,
SPL,
BPL,
SIL,
DIL,
R8L,
R9L,
R10L,
R11L,
R12L,
R13L,
R14L,
R15L,
AX,
CX,
DX,
BX,
SP,
BP,
SI,
DI,
R8W,
R9W,
R10W,
R11W,
R12W,
R13W,
R14W,
R15W,
EAX,
ECX,
EDX,
EBX,
ESP,
EBP,
ESI,
EDI,
R8D,
R9D,
R10D,
R11D,
R12D,
R13D,
R14D,
R15D,
RAX,
RCX,
RDX,
RBX,
RSP,
RBP,
RSI,
RDI,
R8,
R9,
R10,
R11,
R12,
R13,
R14,
R15,
EIP,
RIP,
ES,
CS,
SS,
DS,
FS,
GS,
XMM0,
XMM1,
XMM2,
XMM3,
XMM4,
XMM5,
XMM6,
XMM7,
XMM8,
XMM9,
XMM10,
XMM11,
XMM12,
XMM13,
XMM14,
XMM15,
XMM16,
XMM17,
XMM18,
XMM19,
XMM20,
XMM21,
XMM22,
XMM23,
XMM24,
XMM25,
XMM26,
XMM27,
XMM28,
XMM29,
XMM30,
XMM31,
YMM0,
YMM1,
YMM2,
YMM3,
YMM4,
YMM5,
YMM6,
YMM7,
YMM8,
YMM9,
YMM10,
YMM11,
YMM12,
YMM13,
YMM14,
YMM15,
YMM16,
YMM17,
YMM18,
YMM19,
YMM20,
YMM21,
YMM22,
YMM23,
YMM24,
YMM25,
YMM26,
YMM27,
YMM28,
YMM29,
YMM30,
YMM31,
ZMM0,
ZMM1,
ZMM2,
ZMM3,
ZMM4,
ZMM5,
ZMM6,
ZMM7,
ZMM8,
ZMM9,
ZMM10,
ZMM11,
ZMM12,
ZMM13,
ZMM14,
ZMM15,
ZMM16,
ZMM17,
ZMM18,
ZMM19,
ZMM20,
ZMM21,
ZMM22,
ZMM23,
ZMM24,
ZMM25,
ZMM26,
ZMM27,
ZMM28,
ZMM29,
ZMM30,
ZMM31,
K0,
K1,
K2,
K3,
K4,
K5,
K6,
K7,
BND0,
BND1,
BND2,
BND3,
CR0,
CR1,
CR2,
CR3,
CR4,
CR5,
CR6,
CR7,
CR8,
CR9,
CR10,
CR11,
CR12,
CR13,
CR14,
CR15,
DR0,
DR1,
DR2,
DR3,
DR4,
DR5,
DR6,
DR7,
DR8,
DR9,
DR10,
DR11,
DR12,
DR13,
DR14,
DR15,
ST0,
ST1,
ST2,
ST3,
ST4,
ST5,
ST6,
ST7,
MM0,
MM1,
MM2,
MM3,
MM4,
MM5,
MM6,
MM7,
TR0,
TR1,
TR2,
TR3,
TR4,
TR5,
TR6,
TR7,
}
#[cfg_attr(feature = "cargo-fmt", rustfmt::skip)]
static GEN_DEBUG_REGISTER: [&str; 241] = [
"None",
"AL",
"CL",
"DL",
"BL",
"AH",
"CH",
"DH",
"BH",
"SPL",
"BPL",
"SIL",
"DIL",
"R8L",
"R9L",
"R10L",
"R11L",
"R12L",
"R13L",
"R14L",
"R15L",
"AX",
"CX",
"DX",
"BX",
"SP",
"BP",
"SI",
"DI",
"R8W",
"R9W",
"R10W",
"R11W",
"R12W",
"R13W",
"R14W",
"R15W",
"EAX",
"ECX",
"EDX",
"EBX",
"ESP",
"EBP",
"ESI",
"EDI",
"R8D",
"R9D",
"R10D",
"R11D",
"R12D",
"R13D",
"R14D",
"R15D",
"RAX",
"RCX",
"RDX",
"RBX",
"RSP",
"RBP",
"RSI",
"RDI",
"R8",
"R9",
"R10",
"R11",
"R12",
"R13",
"R14",
"R15",
"EIP",
"RIP",
"ES",
"CS",
"SS",
"DS",
"FS",
"GS",
"XMM0",
"XMM1",
"XMM2",
"XMM3",
"XMM4",
"XMM5",
"XMM6",
"XMM7",
"XMM8",
"XMM9",
"XMM10",
"XMM11",
"XMM12",
"XMM13",
"XMM14",
"XMM15",
"XMM16",
"XMM17",
"XMM18",
"XMM19",
"XMM20",
"XMM21",
"XMM22",
"XMM23",
"XMM24",
"XMM25",
"XMM26",
"XMM27",
"XMM28",
"XMM29",
"XMM30",
"XMM31",
"YMM0",
"YMM1",
"YMM2",
"YMM3",
"YMM4",
"YMM5",
"YMM6",
"YMM7",
"YMM8",
"YMM9",
"YMM10",
"YMM11",
"YMM12",
"YMM13",
"YMM14",
"YMM15",
"YMM16",
"YMM17",
"YMM18",
"YMM19",
"YMM20",
"YMM21",
"YMM22",
"YMM23",
"YMM24",
"YMM25",
"YMM26",
"YMM27",
"YMM28",
"YMM29",
"YMM30",
"YMM31",
"ZMM0",
"ZMM1",
"ZMM2",
"ZMM3",
"ZMM4",
"ZMM5",
"ZMM6",
"ZMM7",
"ZMM8",
"ZMM9",
"ZMM10",
"ZMM11",
"ZMM12",
"ZMM13",
"ZMM14",
"ZMM15",
"ZMM16",
"ZMM17",
"ZMM18",
"ZMM19",
"ZMM20",
"ZMM21",
"ZMM22",
"ZMM23",
"ZMM24",
"ZMM25",
"ZMM26",
"ZMM27",
"ZMM28",
"ZMM29",
"ZMM30",
"ZMM31",
"K0",
"K1",
"K2",
"K3",
"K4",
"K5",
"K6",
"K7",
"BND0",
"BND1",
"BND2",
"BND3",
"CR0",
"CR1",
"CR2",
"CR3",
"CR4",
"CR5",
"CR6",
"CR7",
"CR8",
"CR9",
"CR10",
"CR11",
"CR12",
"CR13",
"CR14",
"CR15",
"DR0",
"DR1",
"DR2",
"DR3",
"DR4",
"DR5",
"DR6",
"DR7",
"DR8",
"DR9",
"DR10",
"DR11",
"DR12",
"DR13",
"DR14",
"DR15",
"ST0",
"ST1",
"ST2",
"ST3",
"ST4",
"ST5",
"ST6",
"ST7",
"MM0",
"MM1",
"MM2",
"MM3",
"MM4",
"MM5",
"MM6",
"MM7",
"TR0",
"TR1",
"TR2",
"TR3",
"TR4",
"TR5",
"TR6",
"TR7",
];
impl fmt::Debug for Register {
#[inline]
fn fmt<'a>(&self, f: &mut fmt::Formatter<'a>) -> fmt::Result {
write!(f, "{}", GEN_DEBUG_REGISTER[*self as usize])?;
Ok(())
}
}
impl Default for Register {
#[cfg_attr(has_must_use, must_use)]
#[inline]
fn default() -> Self {
Register::None
}
}
impl Register {
#[cfg_attr(has_must_use, must_use)]
fn add(self, rhs: u32) -> Self {
let result = (self as u32).wrapping_add(rhs);
assert!(result < IcedConstants::NUMBER_OF_REGISTERS as u32);
unsafe { mem::transmute(result as u8) }
}
#[cfg_attr(has_must_use, must_use)]
fn sub(self, rhs: u32) -> Self {
let result = (self as u32).wrapping_sub(rhs);
assert!(result < IcedConstants::NUMBER_OF_REGISTERS as u32);
unsafe { mem::transmute(result as u8) }
}
}
impl Add<Register> for i32 {
type Output = Register;
#[cfg_attr(has_must_use, must_use)]
#[inline]
fn add(self, rhs: Register) -> Self::Output {
rhs.add(self as u32)
}
}
impl Add<Register> for u32 {
type Output = Register;
#[cfg_attr(has_must_use, must_use)]
#[inline]
fn add(self, rhs: Register) -> Self::Output {
rhs.add(self)
}
}
impl Add<i32> for Register {
type Output = Self;
#[cfg_attr(has_must_use, must_use)]
#[inline]
fn add(self, rhs: i32) -> Self::Output {
self.add(rhs as u32)
}
}
impl Add<u32> for Register {
type Output = Self;
#[cfg_attr(has_must_use, must_use)]
#[inline]
fn add(self, rhs: u32) -> Self::Output {
self.add(rhs)
}
}
impl AddAssign<i32> for Register {
#[inline]
fn add_assign(&mut self, rhs: i32) {
*self = self.add(rhs as u32)
}
}
impl AddAssign<u32> for Register {
#[inline]
fn add_assign(&mut self, rhs: u32) {
*self = self.add(rhs)
}
}
impl Sub<i32> for Register {
type Output = Self;
#[cfg_attr(has_must_use, must_use)]
#[inline]
fn sub(self, rhs: i32) -> Self::Output {
self.sub(rhs as u32)
}
}
impl Sub<u32> for Register {
type Output = Self;
#[cfg_attr(has_must_use, must_use)]
#[inline]
fn sub(self, rhs: u32) -> Self::Output {
self.sub(rhs)
}
}
impl SubAssign<i32> for Register {
#[inline]
fn sub_assign(&mut self, rhs: i32) {
*self = self.sub(rhs as u32)
}
}
impl SubAssign<u32> for Register {
#[inline]
fn sub_assign(&mut self, rhs: u32) {
*self = self.sub(rhs)
}
}