Module hpm5361_pac::uart0

UART0

Modules

• addr_cfg
  address match config register
• cfg
  Configuration Register
• dll
  Divisor Latch LSB (when DLAB = 1)
• dlm
  Divisor Latch MSB (when DLAB = 1)
• fcr
  FIFO Control Register
• fcrr
  FIFO Control Register config
• gpr
  GPR Register
• idle_cfg
  Idle Configuration Register
• ier
  Interrupt Enable Register (when DLAB = 0)
• iir
  Interrupt Identification Register
• iir2
  Interrupt Identification Register2
• lcr
  Line Control Register
• lsr
  Line Status Register
• mcr
  Modem Control Register (
• moto_cfg
  moto system control register
• msr
  Modem Status Register
• oscr
  Over Sample Control Register
• rbr
  Receiver Buffer Register (when DLAB = 0)
• thr
  Transmitter Holding Register (when DLAB = 0)

Structs

• RegisterBlock
  Register block

Type Aliases

• ADDR_CFG
  ADDR_CFG (rw) register accessor: address match config register
• CFG
  Cfg (rw) register accessor: Configuration Register
• DLL
  DLL (rw) register accessor: Divisor Latch LSB (when DLAB = 1)
• DLM
  DLM (rw) register accessor: Divisor Latch MSB (when DLAB = 1)
• FCR
  FCR (rw) register accessor: FIFO Control Register
• FCRR
  FCRR (rw) register accessor: FIFO Control Register config
• GPR
  GPR (rw) register accessor: GPR Register
• IDLE_CFG
  IDLE_CFG (rw) register accessor: Idle Configuration Register
• IER
  IER (rw) register accessor: Interrupt Enable Register (when DLAB = 0)
• IIR
  IIR (rw) register accessor: Interrupt Identification Register
• IIR2
  IIR2 (rw) register accessor: Interrupt Identification Register2
• LCR
  LCR (rw) register accessor: Line Control Register
• LSR
  LSR (rw) register accessor: Line Status Register
• MCR
  MCR (rw) register accessor: Modem Control Register (
• MOTO_CFG
  MOTO_CFG (rw) register accessor: moto system control register
• MSR
  MSR (rw) register accessor: Modem Status Register
• OSCR
  OSCR (rw) register accessor: Over Sample Control Register
• RBR
  RBR (rw) register accessor: Receiver Buffer Register (when DLAB = 0)
• THR
  THR (rw) register accessor: Transmitter Holding Register (when DLAB = 0)