Crate hpm5361_pac

Source
Expand description

Peripheral access API for HPM5361 microcontrollers (generated using svd2rust v0.31.5 ( ))

You can find an overview of the generated API here.

API features to be included in the next svd2rust release can be generated by cloning the svd2rust repository, checking out the above commit, and running cargo doc --open.

Re-exports§

pub use self::fgpio as gpio0;
pub use self::fgpio as pgpio;
pub use self::gptmr0 as gptmr1;
pub use self::gptmr0 as gptmr2;
pub use self::gptmr0 as gptmr3;
pub use self::gptmr0 as ptmr;
pub use self::lin0 as lin1;
pub use self::lin0 as lin2;
pub use self::lin0 as lin3;
pub use self::uart0 as uart1;
pub use self::uart0 as uart2;
pub use self::uart0 as uart3;
pub use self::uart0 as uart4;
pub use self::uart0 as uart5;
pub use self::uart0 as uart6;
pub use self::uart0 as uart7;
pub use self::uart0 as puart;
pub use self::i2c0 as i2c1;
pub use self::i2c0 as i2c2;
pub use self::i2c0 as i2c3;
pub use self::spi0 as spi1;
pub use self::spi0 as spi2;
pub use self::spi0 as spi3;
pub use self::mbx0a as mbx0b;
pub use self::wdg0 as wdg1;
pub use self::wdg0 as pwdg;
pub use self::mcan0 as mcan1;
pub use self::mcan0 as mcan2;
pub use self::mcan0 as mcan3;
pub use self::qei0 as qei1;
pub use self::qeo0 as qeo1;
pub use self::mmc0 as mmc1;
pub use self::pwm0 as pwm1;
pub use self::adc0 as adc1;
pub use self::dac0 as dac1;
pub use self::opamp0 as opamp1;
pub use self::ioc as pioc;
pub use self::pgpr0 as pgpr1;

Modules§

acmp
ACMP
adc0
ADC0
crc
CRC
dac0
DAC0
dmamux
DMAMUX
fgpio
FGPIO
generic
Common register and bit access and modify traits
gpiom
GPIOM
gptmr0
GPTMR0
hdma
HDMA
i2c0
I2C0
ioc
IOC
keym
KEYM
lin0
LIN0
mbx0a
MBX0A
mcan0
MCAN0
mchtmr
MCHTMR
mmc0
MMC0
mon
MON
opamp0
OPAMP0
otp
OTP
pcfg
PCFG
pdgo
PDGO
pgpr0
PGPR0
plb
PLB
plic
PLIC
plicsw
PLICSW
pllctlv2
PLLCTLV2
ppor
PPOR
ptpc
PTPC
pwm0
PWM0
qei0
QEI0
qeo0
QEO0
rdc
RDC
rng
RNG
sdp
SDP
sec
SEC
sei
SEI
spi0
SPI0
synt
SYNT
sysctl
SYSCTL
trgm0
TRGM0
tsns
TSNS
uart0
UART0
usb0
USB0
wdg0
WDG0

Structs§

ACMP
ACMP
ADC0
ADC0
ADC1
ADC1
CRC
CRC
DAC0
DAC0
DAC1
DAC1
DMAMUX
DMAMUX
FGPIO
FGPIO
GPIO0
GPIO0
GPIOM
GPIOM
GPTMR0
GPTMR0
GPTMR1
GPTMR1
GPTMR2
GPTMR2
GPTMR3
GPTMR3
HDMA
HDMA
I2C0
I2C0
I2C1
I2C1
I2C2
I2C2
I2C3
I2C3
IOC
IOC
KEYM
KEYM
LIN0
LIN0
LIN1
LIN1
LIN2
LIN2
LIN3
LIN3
MBX0A
MBX0A
MBX0B
MBX0B
MCAN0
MCAN0
MCAN1
MCAN1
MCAN2
MCAN2
MCAN3
MCAN3
MCHTMR
MCHTMR
MMC0
MMC0
MMC1
MMC1
MON
MON
OPAMP0
OPAMP0
OPAMP1
OPAMP1
OTP
OTP
PCFG
PCFG
PDGO
PDGO
PGPIO
PGPIO
PGPR0
PGPR0
PGPR1
PGPR1
PIOC
PIOC
PLB
PLB
PLIC
PLIC
PLICSW
PLICSW
PLLCTLV2
PLLCTLV2
PPOR
PPOR
PTMR
PTMR
PTPC
PTPC
PUART
PUART
PWDG
PWDG
PWM0
PWM0
PWM1
PWM1
Peripherals
All the peripherals.
QEI0
QEI0
QEI1
QEI1
QEO0
QEO0
QEO1
QEO1
RDC
RDC
RNG
RNG
SDP
SDP
SEC
SEC
SEI
SEI
SPI0
SPI0
SPI1
SPI1
SPI2
SPI2
SPI3
SPI3
SYNT
SYNT
SYSCTL
SYSCTL
TRGM0
TRGM0
TSNS
TSNS
UART0
UART0
UART1
UART1
UART2
UART2
UART3
UART3
UART4
UART4
UART5
UART5
UART6
UART6
UART7
UART7
USB0
USB0
WDG0
WDG0
WDG1
WDG1

Constants§

NVIC_PRIO_BITS
Number available in the NVIC for configuring priority