Module gd32vf103_pac::dma1::intc

Interrupt flag clear register

Structs

• INTC_SPEC
  Interrupt flag clear register
• W
  Register INTC writer

Type Definitions

• ERRIFC0_W
  Field ERRIFC0 writer - Clear bit for error flag of channel 0
• ERRIFC1_W
  Field ERRIFC1 writer - Clear bit for error flag of channel 1
• ERRIFC2_W
  Field ERRIFC2 writer - Clear bit for error flag of channel 2
• ERRIFC3_W
  Field ERRIFC3 writer - Clear bit for error flag of channel 3
• ERRIFC4_W
  Field ERRIFC4 writer - Clear bit for error flag of channel 4
• FTFIFC0_W
  Field FTFIFC0 writer - Clear bit for full transfer finish flag of channel 0
• FTFIFC1_W
  Field FTFIFC1 writer - Clear bit for full transfer finish flag of channel 1
• FTFIFC2_W
  Field FTFIFC2 writer - Clear bit for full transfer finish flag of channel 2
• FTFIFC3_W
  Field FTFIFC3 writer - Clear bit for full transfer finish flag of channel 3
• FTFIFC4_W
  Field FTFIFC4 writer - Clear bit for full transfer finish flag of channel 4
• GIFC0_W
  Field GIFC0 writer - Clear global interrupt flag of channel 0
• GIFC1_W
  Field GIFC1 writer - Clear global interrupt flag of channel 1
• GIFC2_W
  Field GIFC2 writer - Clear global interrupt flag of channel 2
• GIFC3_W
  Field GIFC3 writer - Clear global interrupt flag of channel 3
• GIFC4_W
  Field GIFC4 writer - Clear global interrupt flag of channel 4
• HTFIFC0_W
  Field HTFIFC0 writer - Clear bit for half transfer finish flag of channel 0
• HTFIFC1_W
  Field HTFIFC1 writer - Clear bit for half transfer finish flag of channel 1
• HTFIFC2_W
  Field HTFIFC2 writer - Clear bit for half transfer finish flag of channel 2
• HTFIFC3_W
  Field HTFIFC3 writer - Clear bit for half transfer finish flag of channel 3
• HTFIFC4_W
  Field HTFIFC4 writer - Clear bit for half transfer finish flag of channel 4