Module gd32vf103_pac::fmc::ctl0

source ·
Expand description

Control register 0

Structs

  • CTL0_SPEC
    Control register 0
  • R
    Register CTL0 reader
  • W
    Register CTL0 writer

Type Definitions

  • ENDIE_R
    Field ENDIE reader - End of operation interrupt enable bit
  • ENDIE_W
    Field ENDIE writer - End of operation interrupt enable bit
  • ERRIE_R
    Field ERRIE reader - Error interrupt enable bit
  • ERRIE_W
    Field ERRIE writer - Error interrupt enable bit
  • LK_R
    Field LK reader - FMC_CTL0 lock bit
  • LK_W
    Field LK writer - FMC_CTL0 lock bit
  • MER_R
    Field MER reader - Main flash mass erase for bank0 command bit
  • MER_W
    Field MER writer - Main flash mass erase for bank0 command bit
  • OBER_R
    Field OBER reader - Option bytes erase command bit
  • OBER_W
    Field OBER writer - Option bytes erase command bit
  • OBPG_R
    Field OBPG reader - Option bytes program command bit
  • OBPG_W
    Field OBPG writer - Option bytes program command bit
  • OBWEN_R
    Field OBWEN reader - Option byte erase/program enable bit
  • OBWEN_W
    Field OBWEN writer - Option byte erase/program enable bit
  • PER_R
    Field PER reader - Main flash page erase for bank0 command bit
  • PER_W
    Field PER writer - Main flash page erase for bank0 command bit
  • PG_R
    Field PG reader - Main flash program for bank0 command bit
  • PG_W
    Field PG writer - Main flash program for bank0 command bit
  • START_R
    Field START reader - Send erase command to FMC bit
  • START_W
    Field START writer - Send erase command to FMC bit