Module gd32vf103_pac::timer1::ctl1

source ·
Expand description

control register 1

Structs

  • CTL1_SPEC
    control register 1
  • R
    Register CTL1 reader
  • W
    Register CTL1 writer

Type Definitions

  • DMAS_R
    Field DMAS reader - DMA request source selection
  • DMAS_W
    Field DMAS writer - DMA request source selection
  • MMC_R
    Field MMC reader - Master mode control
  • MMC_W
    Field MMC writer - Master mode control
  • TI0S_R
    Field TI0S reader - Channel 0 trigger input selection
  • TI0S_W
    Field TI0S writer - Channel 0 trigger input selection