Module gd32vf103_pac::rcu::cfg1

source ·
Expand description

Clock Configuration register 1

Structs

  • Clock Configuration register 1
  • Register CFG1 reader
  • Register CFG1 writer

Type Definitions

  • Field I2S1SEL reader - I2S1 Clock Source Selection
  • Field I2S1SEL writer - I2S1 Clock Source Selection
  • Field I2S2SEL reader - I2S2 Clock Source Selection
  • Field I2S2SEL writer - I2S2 Clock Source Selection
  • Field PLL1MF reader - The PLL1 clock multiplication factor
  • Field PLL1MF writer - The PLL1 clock multiplication factor
  • Field PLL2MF reader - The PLL2 clock multiplication factor
  • Field PLL2MF writer - The PLL2 clock multiplication factor
  • Field PREDV0SEL reader - PREDV0 input Clock Source Selection
  • Field PREDV0SEL writer - PREDV0 input Clock Source Selection
  • Field PREDV0 reader - PREDV0 division factor
  • Field PREDV0 writer - PREDV0 division factor
  • Field PREDV1 reader - PREDV1 division factor
  • Field PREDV1 writer - PREDV1 division factor