Module gd32vf103_pac::dma0::intf
source · Expand description
Interrupt flag register
Structs
- Interrupt flag register
- Register
INTF
reader
Type Definitions
- Field
ERRIF0
reader - Error flag of channel 0 - Field
ERRIF1
reader - Error flag of channel 1 - Field
ERRIF2
reader - Error flag of channel 2 - Field
ERRIF3
reader - Error flag of channel 3 - Field
ERRIF4
reader - Error flag of channel 4 - Field
ERRIF5
reader - Error flag of channel 5 - Field
ERRIF6
reader - Error flag of channel 6 - Field
FTFIF0
reader - Full Transfer finish flag of channe 0 - Field
FTFIF1
reader - Full Transfer finish flag of channe 1 - Field
FTFIF2
reader - Full Transfer finish flag of channe 2 - Field
FTFIF3
reader - Full Transfer finish flag of channe 3 - Field
FTFIF4
reader - Full Transfer finish flag of channe 4 - Field
FTFIF5
reader - Full Transfer finish flag of channe 5 - Field
FTFIF6
reader - Full Transfer finish flag of channe 6 - Field
GIF0
reader - Global interrupt flag of channel 0 - Field
GIF1
reader - Global interrupt flag of channel 1 - Field
GIF2
reader - Global interrupt flag of channel 2 - Field
GIF3
reader - Global interrupt flag of channel 3 - Field
GIF4
reader - Global interrupt flag of channel 4 - Field
GIF5
reader - Global interrupt flag of channel 5 - Field
GIF6
reader - Global interrupt flag of channel 6 - Field
HTFIF0
reader - Half transfer finish flag of channel 0 - Field
HTFIF1
reader - Half transfer finish flag of channel 1 - Field
HTFIF2
reader - Half transfer finish flag of channel 2 - Field
HTFIF3
reader - Half transfer finish flag of channel 3 - Field
HTFIF4
reader - Half transfer finish flag of channel 4 - Field
HTFIF5
reader - Half transfer finish flag of channel 5 - Field
HTFIF6
reader - Half transfer finish flag of channel 6