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#[doc = "Reader of register CTL1"] pub type R = crate::R<u32, super::CTL1>; #[doc = "Writer for register CTL1"] pub type W = crate::W<u32, super::CTL1>; #[doc = "Register CTL1 `reset()`'s with value 0"] impl crate::ResetValue for super::CTL1 { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `LMEN`"] pub type LMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `LMEN`"] pub struct LMEN_W<'a> { w: &'a mut W, } impl<'a> LMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); self.w } } #[doc = "Reader of field `STB`"] pub type STB_R = crate::R<u8, u8>; #[doc = "Write proxy for field `STB`"] pub struct STB_W<'a> { w: &'a mut W, } impl<'a> STB_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 12)) | (((value as u32) & 0x03) << 12); self.w } } #[doc = "Reader of field `CKEN`"] pub type CKEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `CKEN`"] pub struct CKEN_W<'a> { w: &'a mut W, } impl<'a> CKEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11); self.w } } #[doc = "Reader of field `CPL`"] pub type CPL_R = crate::R<bool, bool>; #[doc = "Write proxy for field `CPL`"] pub struct CPL_W<'a> { w: &'a mut W, } impl<'a> CPL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10); self.w } } #[doc = "Reader of field `CPH`"] pub type CPH_R = crate::R<bool, bool>; #[doc = "Write proxy for field `CPH`"] pub struct CPH_W<'a> { w: &'a mut W, } impl<'a> CPH_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); self.w } } #[doc = "Reader of field `CLEN`"] pub type CLEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `CLEN`"] pub struct CLEN_W<'a> { w: &'a mut W, } impl<'a> CLEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); self.w } } #[doc = "Reader of field `LBDIE`"] pub type LBDIE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `LBDIE`"] pub struct LBDIE_W<'a> { w: &'a mut W, } impl<'a> LBDIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); self.w } } #[doc = "Reader of field `LBLEN`"] pub type LBLEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `LBLEN`"] pub struct LBLEN_W<'a> { w: &'a mut W, } impl<'a> LBLEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); self.w } } #[doc = "Reader of field `ADDR`"] pub type ADDR_R = crate::R<u8, u8>; #[doc = "Write proxy for field `ADDR`"] pub struct ADDR_W<'a> { w: &'a mut W, } impl<'a> ADDR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x0f) | ((value as u32) & 0x0f); self.w } } impl R { #[doc = "Bit 14 - LIN mode enable"] #[inline(always)] pub fn lmen(&self) -> LMEN_R { LMEN_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bits 12:13 - STOP bits length"] #[inline(always)] pub fn stb(&self) -> STB_R { STB_R::new(((self.bits >> 12) & 0x03) as u8) } #[doc = "Bit 11 - CK pin enable"] #[inline(always)] pub fn cken(&self) -> CKEN_R { CKEN_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Clock polarity"] #[inline(always)] pub fn cpl(&self) -> CPL_R { CPL_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Clock phase"] #[inline(always)] pub fn cph(&self) -> CPH_R { CPH_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - CK Length"] #[inline(always)] pub fn clen(&self) -> CLEN_R { CLEN_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 6 - LIN break detection interrupt enable"] #[inline(always)] pub fn lbdie(&self) -> LBDIE_R { LBDIE_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - LIN break frame length"] #[inline(always)] pub fn lblen(&self) -> LBLEN_R { LBLEN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bits 0:3 - Address of the USART"] #[inline(always)] pub fn addr(&self) -> ADDR_R { ADDR_R::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bit 14 - LIN mode enable"] #[inline(always)] pub fn lmen(&mut self) -> LMEN_W { LMEN_W { w: self } } #[doc = "Bits 12:13 - STOP bits length"] #[inline(always)] pub fn stb(&mut self) -> STB_W { STB_W { w: self } } #[doc = "Bit 11 - CK pin enable"] #[inline(always)] pub fn cken(&mut self) -> CKEN_W { CKEN_W { w: self } } #[doc = "Bit 10 - Clock polarity"] #[inline(always)] pub fn cpl(&mut self) -> CPL_W { CPL_W { w: self } } #[doc = "Bit 9 - Clock phase"] #[inline(always)] pub fn cph(&mut self) -> CPH_W { CPH_W { w: self } } #[doc = "Bit 8 - CK Length"] #[inline(always)] pub fn clen(&mut self) -> CLEN_W { CLEN_W { w: self } } #[doc = "Bit 6 - LIN break detection interrupt enable"] #[inline(always)] pub fn lbdie(&mut self) -> LBDIE_W { LBDIE_W { w: self } } #[doc = "Bit 5 - LIN break frame length"] #[inline(always)] pub fn lblen(&mut self) -> LBLEN_W { LBLEN_W { w: self } } #[doc = "Bits 0:3 - Address of the USART"] #[inline(always)] pub fn addr(&mut self) -> ADDR_W { ADDR_W { w: self } } }