Module gd32f1x0_hal::pac::tsi::ctl[][src]

Expand description

control register

Structs

CDT_R

Field CDT reader - Charge State Duration Time

CDT_W

Field CDT writer - Charge State Duration Time

CTCDIV_R

Field CTCDIV reader - CTCLK clock division factor

CTCDIV_W

Field CTCDIV writer - CTCLK clock division factor

CTDT_R

Field CTDT reader - Charge Transfer State Duration Time

CTDT_W

Field CTDT writer - Charge Transfer State Duration Time

CTL_SPEC

control register

ECDIV_R

Field ECDIV reader - ECCLK clock division factor

ECDIV_W

Field ECDIV writer - ECCLK clock division factor

ECDT_R

Field ECDT reader - Extend Charge State Maximum Duration Time

ECDT_W

Field ECDT writer - Extend Charge State Maximum Duration Time

ECEN_R

Field ECEN reader - Extend Charge State Enable

ECEN_W

Field ECEN writer - Extend Charge State Enable

EGSEL_R

Field EGSEL reader - Edge selection

EGSEL_W

Field EGSEL writer - Edge selection

MCN_R

Field MCN reader - Max cycle number of a sequence

MCN_W

Field MCN writer - Max cycle number of a sequence

PINMOD_R

Field PINMOD reader - Pin mode

PINMOD_W

Field PINMOD writer - Pin mode

R

Register CTL reader

TRGMOD_R

Field TRGMOD reader - Trigger mode selection

TRGMOD_W

Field TRGMOD writer - Trigger mode selection

TSIEN_R

Field TSIEN reader - TSI enable

TSIEN_W

Field TSIEN writer - TSI enable

TSIS_R

Field TSIS reader - TSI start

TSIS_W

Field TSIS writer - TSI start

W

Register CTL writer