Module gd32f1x0_hal::pac::timer15::chctl0_input [−][src]
Expand description
Channel control register 0 (input mode)
Structs
CH0CAPFLT_R | Field |
CH0CAPFLT_W | Field |
CH0CAPPSC_R | Field |
CH0CAPPSC_W | Field |
CH0MS_R | Field |
CH0MS_W | Field |
CHCTL0_INPUT_SPEC | Channel control register 0 (input mode) |
R | Register |
W | Register |
Enums
CH0CAPFLT_A | Channel 0 input capture filter control |
CH0CAPPSC_A | Channel 0 input capture prescaler |
CH0MS_A | Channel 0 mode selection |