Module gd32f1x0_hal::pac::timer14::ctl1

control register 1

Structs

CCSE_R	Field CCSE reader - Commutation control shadow register enable
CCSE_W	Field CCSE writer - Commutation control shadow register enable
CCUC_R	Field CCUC reader - Commutation control shadow register update control
CCUC_W	Field CCUC writer - Commutation control shadow register update control
CTL1_SPEC	control register 1
DMAS_R	Field DMAS reader - DMA request source selection
DMAS_W	Field DMAS writer - DMA request source selection
ISO0N_R	Field ISO0N reader - Idle state of channel 1 output
ISO0N_W	Field ISO0N writer - Idle state of channel 1 output
ISO0_R	Field ISO0 reader - Idle state of channel 0 output
ISO0_W	Field ISO0 writer - Idle state of channel 0 output
ISO1_R	Field ISO1 reader - Idle state of channel 1 output
ISO1_W	Field ISO1 writer - Idle state of channel 1 output
MMC_R	Field MMC reader - Master mode control
MMC_W	Field MMC writer - Master mode control
R	Register CTL1 reader
W	Register CTL1 writer

Enums

CCSE_A	Commutation control shadow register enable
CCUC_A	Commutation control shadow register update control
DMAS_A	DMA request source selection
ISO0N_A	Idle state of channel 1 output
ISO0_A	Idle state of channel 0 output
ISO1_A	Idle state of channel 1 output
MMC_A	Master mode control