Module gd32f1x0_hal::pac::timer14::cchp[−][src]

Expand description

Complementary Channel Protection register

Structs

BRKEN_R	Field `BRKEN` reader - Break enable
BRKEN_W	Field `BRKEN` writer - Break enable
BRKP_R	Field `BRKP` reader - Break polarity
BRKP_W	Field `BRKP` writer - Break polarity
CCHP_SPEC	Complementary Channel Protection register
DTCFG_R	Field `DTCFG` reader - Dead time configure
DTCFG_W	Field `DTCFG` writer - Dead time configure
IOS_R	Field `IOS` reader - Idle mode off-state configure
IOS_W	Field `IOS` writer - Idle mode off-state configure
OAEN_R	Field `OAEN` reader - Output automatic enable
OAEN_W	Field `OAEN` writer - Output automatic enable
POEN_R	Field `POEN` reader - Primary output enable
POEN_W	Field `POEN` writer - Primary output enable
PROT_R	Field `PROT` reader - Complementary register protect control
PROT_W	Field `PROT` writer - Complementary register protect control
R	Register `CCHP` reader
ROS_R	Field `ROS` reader - Run mode off-state configure
ROS_W	Field `ROS` writer - Run mode off-state configure
W	Register `CCHP` writer

BRKEN_A	Break enable
BRKP_A	Break polarity
IOS_A	Idle mode off-state configure
OAEN_A	Output automatic enable
POEN_A	Primary output enable
PROT_A	Complementary register protect control
ROS_A	Run mode off-state configure