Module gd32f1x0_hal::pac::timer1::intf [−][src]
Expand description
interrupt flag register
Structs
| CH0IF_W | Field |
| CH0OF_W | Field |
| CH1IF_W | Field |
| CH1OF_W | Field |
| CH2IF_W | Field |
| CH2OF_W | Field |
| CH3IF_R | Field |
| CH3IF_W | Field |
| CH3OF_R | Field |
| CH3OF_W | Field |
| INTF_SPEC | interrupt flag register |
| R | Register |
| TRGIF_R | Field |
| TRGIF_W | Field |
| UPIF_R | Field |
| UPIF_W | Field |
| W | Register |
Enums
| CH3IF_A | Channel 3 Capture/Compare interrupt enable |
| CH3OF_A | Channel 3 Capture overflow flag |
| TRGIF_A | Trigger interrupt flag |
| UPIF_A | Update interrupt flag |
Type Definitions
| CH0IF_A | Channel 0 Capture/Compare interrupt flag |
| CH0IF_R | Field |
| CH0OF_A | Channel 0 Capture overflow flag |
| CH0OF_R | Field |
| CH1IF_A | Channel 1 Capture/Compare interrupt enable |
| CH1IF_R | Field |
| CH1OF_A | Channel 1 Capture overflow flag |
| CH1OF_R | Field |
| CH2IF_A | Channel 2 Capture/Compare interrupt enable |
| CH2IF_R | Field |
| CH2OF_A | Channel 2 Capture overflow flag |
| CH2OF_R | Field |