Module gd32f1x0_hal::pac::timer1::chctl2 [−][src]
Expand description
Channel control register 2
Structs
| CH0EN_W | Field |
| CH0NP_W | Field |
| CH0P_W | Field |
| CH1EN_W | Field |
| CH1NP_W | Field |
| CH1P_W | Field |
| CH2EN_W | Field |
| CH2NP_W | Field |
| CH2P_W | Field |
| CH3EN_R | Field |
| CH3EN_W | Field |
| CH3NP_R | Field |
| CH3NP_W | Field |
| CH3P_R | Field |
| CH3P_W | Field |
| CHCTL2_SPEC | Channel control register 2 |
| R | Register |
| W | Register |
Enums
| CH3EN_A | Channel 3 enable |
| CH3NP_A | Channel 3 complementary output polarity |
| CH3P_A | Channel 3 polarity |
Type Definitions
| CH0EN_A | Channel 0 enable |
| CH0EN_R | Field |
| CH0NP_A | Channel 0 complementary output polarity |
| CH0NP_R | Field |
| CH0P_A | Channel 0 polarity |
| CH0P_R | Field |
| CH1EN_A | Channel 1 enable |
| CH1EN_R | Field |
| CH1NP_A | Channel 1 complementary output polarity |
| CH1NP_R | Field |
| CH1P_A | Channel 1 polarity |
| CH1P_R | Field |
| CH2EN_A | Channel 2 enable |
| CH2EN_R | Field |
| CH2NP_A | Channel 2 complementary output polarity |
| CH2NP_R | Field |
| CH2P_A | Channel 2 polarity |
| CH2P_R | Field |