Module gd32f1x0_hal::pac::spi0::i2sctl[−][src]

Expand description

I2S control register

Structs

CHLEN_R	Field `CHLEN` reader - Channel length
CHLEN_W	Field `CHLEN` writer - Channel length
CKPL_R	Field `CKPL` reader - Idle state clock polarity
CKPL_W	Field `CKPL` writer - Idle state clock polarity
DTLEN_R	Field `DTLEN` reader - Data length
DTLEN_W	Field `DTLEN` writer - Data length
I2SCTL_SPEC	I2S control register
I2SEN_R	Field `I2SEN` reader - I2S Enable
I2SEN_W	Field `I2SEN` writer - I2S Enable
I2SOPMOD_R	Field `I2SOPMOD` reader - I2S configuration mode
I2SOPMOD_W	Field `I2SOPMOD` writer - I2S configuration mode
I2SSEL_R	Field `I2SSEL` reader - I2S mode selection
I2SSEL_W	Field `I2SSEL` writer - I2S mode selection
I2SSTD_R	Field `I2SSTD` reader - I2S standard selection
I2SSTD_W	Field `I2SSTD` writer - I2S standard selection
PCMSMOD_R	Field `PCMSMOD` reader - PCM frame synchronization mode
PCMSMOD_W	Field `PCMSMOD` writer - PCM frame synchronization mode
R	Register `I2SCTL` reader
W	Register `I2SCTL` writer

CHLEN_A	Channel length
CKPL_A	Idle state clock polarity
DTLEN_A	Data length
I2SEN_A	I2S Enable
I2SOPMOD_A	I2S configuration mode
I2SSEL_A	I2S mode selection
I2SSTD_A	I2S standard selection
PCMSMOD_A	PCM frame synchronization mode