Module gd32f1x0_hal::pac::spi0::ctl1

control register 1

Structs

CTL1_SPEC	control register 1
DMAREN_R	Field DMAREN reader - Receive Buffer DMA Enable
DMAREN_W	Field DMAREN writer - Receive Buffer DMA Enable
DMATEN_R	Field DMATEN reader - Transmit Buffer DMA Enable
DMATEN_W	Field DMATEN writer - Transmit Buffer DMA Enable
ERRIE_R	Field ERRIE reader - Error interrupt enable
ERRIE_W	Field ERRIE writer - Error interrupt enable
NSSDRV_R	Field NSSDRV reader - Drive NSS Output
NSSDRV_W	Field NSSDRV writer - Drive NSS Output
R	Register CTL1 reader
RBNEIE_R	Field RBNEIE reader - RX buffer not empty interrupt enable
RBNEIE_W	Field RBNEIE writer - RX buffer not empty interrupt enable
TBEIE_R	Field TBEIE reader - Tx buffer empty interrupt enable
TBEIE_W	Field TBEIE writer - Tx buffer empty interrupt enable
W	Register CTL1 writer

Enums

DMAREN_A	Receive Buffer DMA Enable
DMATEN_A	Transmit Buffer DMA Enable
ERRIE_A	Error interrupt enable
NSSDRV_A	Drive NSS Output
RBNEIE_A	RX buffer not empty interrupt enable
TBEIE_A	Tx buffer empty interrupt enable