Module gd32f1x0_hal::pac::dbg::ctl0 [−][src]
Expand description
Debug Control Register 0
Structs
| CTL0_SPEC | Debug Control Register 0 |
| DSLP_HOLD_R | Field |
| DSLP_HOLD_W | Field |
| FWDGT_HOLD_R | Field |
| FWDGT_HOLD_W | Field |
| I2C0_HOLD_R | Field |
| I2C0_HOLD_W | Field |
| I2C1_HOLD_W | Field |
| I2C2_HOLD_W | Field |
| R | Register |
| SLP_HOLD_R | Field |
| SLP_HOLD_W | Field |
| STB_HOLD_R | Field |
| STB_HOLD_W | Field |
| TIMER0_HOLD_R | Field |
| TIMER0_HOLD_W | Field |
| TIMER1_HOLD_W | Field |
| TIMER2_HOLD_W | Field |
| TIMER5_HOLD_W | Field |
| TIMER13_HOLD_W | Field |
| W | Register |
| WWDGT_HOLD_W | Field |
Enums
| DSLP_HOLD_A | Deep-sleep mode hold register |
| FWDGT_HOLD_A | FWDGT hold register |
| I2C0_HOLD_A | I2C0 hold register |
| SLP_HOLD_A | Sleep mode hold register |
| STB_HOLD_A | Standby mode hold register |
| TIMER0_HOLD_A | Timer 0 hold register |
Type Definitions
| I2C1_HOLD_A | I2C1 hold register |
| I2C1_HOLD_R | Field |
| I2C2_HOLD_A | I2C2 hold register |
| I2C2_HOLD_R | Field |
| TIMER1_HOLD_A | Timer 1 hold register |
| TIMER1_HOLD_R | Field |
| TIMER2_HOLD_A | Timer 2 hold register |
| TIMER2_HOLD_R | Field |
| TIMER5_HOLD_A | Timer 5 hold register |
| TIMER5_HOLD_R | Field |
| TIMER13_HOLD_A | Timer 13 hold register |
| TIMER13_HOLD_R | Field |
| WWDGT_HOLD_A | WWDGT hold register |
| WWDGT_HOLD_R | Field |