Module gd32f1x0_hal::pac::adc::ctl0 [−][src]
Expand description
control register 0
Structs
CTL0_SPEC | control register 0 |
DISIC_R | Field |
DISIC_W | Field |
DISNUM_R | Field |
DISNUM_W | Field |
DISRC_R | Field |
DISRC_W | Field |
EOCIE_R | Field |
EOCIE_W | Field |
EOICIE_R | Field |
EOICIE_W | Field |
ICA_R | Field |
ICA_W | Field |
IWDEN_R | Field |
IWDEN_W | Field |
R | Register |
RWDEN_R | Field |
RWDEN_W | Field |
SM_R | Field |
SM_W | Field |
W | Register |
WDCHSEL_R | Field |
WDCHSEL_W | Field |
WDEIE_R | Field |
WDEIE_W | Field |
WDSC_R | Field |
WDSC_W | Field |
Enums
DISIC_A | Discontinuous mode on injected channels |
DISRC_A | Discontinuous mode on regular channels |
EOCIE_A | Interrupt enable for EOC |
EOICIE_A | Interrupt enable for EOIC |
ICA_A | Inserted channel group convert automatically |
IWDEN_A | Inserted channel analog watchdog enable |
RWDEN_A | Regular channel analog watchdog enable |
SM_A | Scan mode |
WDEIE_A | Interrupt enable for WDE |
WDSC_A | When in scan mode, analog watchdog is effective on a single channel |