Expand description
Reset and clock unit
Modules§
- Additional enable register
- Additional reset register
- AHB enable register (RCU_AHBEN)
- AHB reset register
- APB1 enable register (RCU_APB1EN)
- APB1 reset register (RCU_APB1RST)
- APB2 enable register (RCU_APB2EN)
- APB2 reset register (RCU_APB2RST)
- Backup domain control register (RCU_BDCTL)
- Clock configuration register 0 (RCU_CFG0)
- Configuration register 1
- Configuration register 2
- Configuration register 4
- Control register 0
- Control register 1
- Deep-sleep mode voltage register
- Clock interrupt register (RCU_INT)
- Reset source /clock register (RCU_RSTSCK)
- Voltage key register
Structs§
- Register block
Type Aliases§
- ADDEN (rw) register accessor: Additional enable register
- ADDRST (rw) register accessor: Additional reset register
- AHBEN (rw) register accessor: AHB enable register (RCU_AHBEN)
- AHBRST (rw) register accessor: AHB reset register
- APB1EN (rw) register accessor: APB1 enable register (RCU_APB1EN)
- APB1RST (rw) register accessor: APB1 reset register (RCU_APB1RST)
- APB2EN (rw) register accessor: APB2 enable register (RCU_APB2EN)
- APB2RST (rw) register accessor: APB2 reset register (RCU_APB2RST)
- BDCTL (rw) register accessor: Backup domain control register (RCU_BDCTL)
- CFG0 (rw) register accessor: Clock configuration register 0 (RCU_CFG0)
- CFG1 (rw) register accessor: Configuration register 1
- CFG2 (rw) register accessor: Configuration register 2
- CFG3 (rw) register accessor: Configuration register 4
- CTL0 (rw) register accessor: Control register 0
- CTL1 (rw) register accessor: Control register 1
- DSV (rw) register accessor: Deep-sleep mode voltage register
- INT (rw) register accessor: Clock interrupt register (RCU_INT)
- RSTSCK (rw) register accessor: Reset source /clock register (RCU_RSTSCK)
- VKEY (rw) register accessor: Voltage key register