Expand description
GPIO port control register
Re-exports§
pub use Ctl0R as Ctl1R;
pub use Ctl0R as Ctl2R;
pub use Ctl0R as Ctl3R;
pub use Ctl0R as Ctl4R;
pub use Ctl0R as Ctl5R;
pub use Ctl0R as Ctl6R;
pub use Ctl0R as Ctl7R;
pub use Ctl0R as Ctl8R;
pub use Ctl0R as Ctl9R;
pub use Ctl0R as Ctl10R;
pub use Ctl0R as Ctl11R;
pub use Ctl0R as Ctl12R;
pub use Ctl0R as Ctl13R;
pub use Ctl0R as Ctl14R;
pub use Ctl0R as Ctl15R;
pub use Ctl0W as Ctl1W;
pub use Ctl0W as Ctl2W;
pub use Ctl0W as Ctl3W;
pub use Ctl0W as Ctl4W;
pub use Ctl0W as Ctl5W;
pub use Ctl0W as Ctl6W;
pub use Ctl0W as Ctl7W;
pub use Ctl0W as Ctl8W;
pub use Ctl0W as Ctl9W;
pub use Ctl0W as Ctl10W;
pub use Ctl0W as Ctl11W;
pub use Ctl0W as Ctl12W;
pub use Ctl0W as Ctl13W;
pub use Ctl0W as Ctl14W;
pub use Ctl0W as Ctl15W;
Structs§
- GPIO port control register
Enums§
- Port x configuration bits (y = 0..15)
Type Aliases§
- Field
CTL0
reader - Port x configuration bits (y = 0..15) - Field
CTL0
writer - Port x configuration bits (y = 0..15) - Register
CTL
reader - Register
CTL
writer