Module gd32f1::gd32f130::timer5::ctl0

control register 0

Re-exports

• pub use crate::gd32f130::timer0::ctl0::Cen;
• pub use crate::gd32f130::timer0::ctl0::CenR;
• pub use crate::gd32f130::timer0::ctl0::CenW;
• pub use crate::gd32f130::timer0::ctl0::Updis;
• pub use crate::gd32f130::timer0::ctl0::UpdisR;
• pub use crate::gd32f130::timer0::ctl0::UpdisW;
• pub use crate::gd32f130::timer0::ctl0::Ups;
• pub use crate::gd32f130::timer0::ctl0::UpsR;
• pub use crate::gd32f130::timer0::ctl0::UpsW;
• pub use crate::gd32f130::timer0::ctl0::Arse;
• pub use crate::gd32f130::timer0::ctl0::ArseR;
• pub use crate::gd32f130::timer0::ctl0::ArseW;

Structs

• Ctl0Spec
  control register 0

Enums

• Spm
  Single pulse mode

Type Aliases

• R
  Register CTL0 reader
• SpmR
  Field SPM reader - Single pulse mode
• SpmW
  Field SPM writer - Single pulse mode
• W
  Register CTL0 writer