1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
#[doc = "Register `SWEVG` writer"]
pub struct W(crate::W<SWEVG_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<SWEVG_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<SWEVG_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<SWEVG_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Break event generation"]
pub type BRKG_AW = crate::gd32f130::timer0::swevg::BRKG_AW;
#[doc = "Field `BRKG` writer - Break event generation"]
pub struct BRKG_W<'a> {
w: &'a mut W,
}
impl<'a> BRKG_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: BRKG_AW) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Generate a break event"]
#[inline(always)]
pub fn break_(self) -> &'a mut W {
self.variant(BRKG_AW::BREAK)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u16 & 0x01) << 7);
self.w
}
}
#[doc = "Channel commutation event generation"]
pub type CMTG_AW = crate::gd32f130::timer0::swevg::CMTG_AW;
#[doc = "Field `CMTG` writer - Channel commutation event generation"]
pub struct CMTG_W<'a> {
w: &'a mut W,
}
impl<'a> CMTG_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: CMTG_AW) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Generate a channel commutation event, updating capture/compare control registers based on the value of CCSE"]
#[inline(always)]
pub fn update(self) -> &'a mut W {
self.variant(CMTG_AW::UPDATE)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u16 & 0x01) << 5);
self.w
}
}
#[doc = "Channel 0 capture or compare event generation"]
pub type CH0G_AW = crate::gd32f130::timer0::swevg::CH0G_AW;
#[doc = "Field `CH0G` writer - Channel 0 capture or compare event generation"]
pub struct CH0G_W<'a> {
w: &'a mut W,
}
impl<'a> CH0G_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: CH0G_AW) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Generate a capture or compare event"]
#[inline(always)]
pub fn capture_compare(self) -> &'a mut W {
self.variant(CH0G_AW::CAPTURECOMPARE)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u16 & 0x01) << 1);
self.w
}
}
#[doc = "Update generation"]
pub type UPG_AW = crate::gd32f130::timer0::swevg::UPG_AW;
#[doc = "Field `UPG` writer - Update generation"]
pub struct UPG_W<'a> {
w: &'a mut W,
}
impl<'a> UPG_W<'a> {
#[doc = r"Writes `variant` to the field"]
#[inline(always)]
pub fn variant(self, variant: UPG_AW) -> &'a mut W {
self.bit(variant.into())
}
#[doc = "Re-initializes the timer counter and generates an update of the registers."]
#[inline(always)]
pub fn update(self) -> &'a mut W {
self.variant(UPG_AW::UPDATE)
}
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !0x01) | (value as u16 & 0x01);
self.w
}
}
impl W {
#[doc = "Bit 7 - Break event generation"]
#[inline(always)]
pub fn brkg(&mut self) -> BRKG_W {
BRKG_W { w: self }
}
#[doc = "Bit 5 - Channel commutation event generation"]
#[inline(always)]
pub fn cmtg(&mut self) -> CMTG_W {
CMTG_W { w: self }
}
#[doc = "Bit 1 - Channel 0 capture or compare event generation"]
#[inline(always)]
pub fn ch0g(&mut self) -> CH0G_W {
CH0G_W { w: self }
}
#[doc = "Bit 0 - Update generation"]
#[inline(always)]
pub fn upg(&mut self) -> UPG_W {
UPG_W { w: self }
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u16) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "Software event generation register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swevg](index.html) module"]
pub struct SWEVG_SPEC;
impl crate::RegisterSpec for SWEVG_SPEC {
type Ux = u16;
}
#[doc = "`write(|w| ..)` method takes [swevg::W](W) writer structure"]
impl crate::Writable for SWEVG_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets SWEVG to value 0"]
impl crate::Resettable for SWEVG_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}