Module gd32f1::gd32f130::adc[][src]

Expand description

Analog to digital converter

Modules

control register 0

control register 1

injected data register 0

injected data register 1

injected data register 2

injected data register 3

Inserted channel data offset register 0

Inserted channel data offset register 1

Inserted channel data offset register 2

Inserted channel data offset register 3

Inserted sequence register

regular data register

regular sequence register 0

regular sequence register 1

regular sequence register 2

Sampling time register 1

Sampling time register 2

status register

watchdog higher threshold register

watchdog lower threshold register

Structs

Register block

Type Definitions

CTL0 register accessor: an alias for Reg<CTL0_SPEC>

CTL1 register accessor: an alias for Reg<CTL1_SPEC>

IDATA0 register accessor: an alias for Reg<IDATA0_SPEC>

IDATA1 register accessor: an alias for Reg<IDATA1_SPEC>

IDATA2 register accessor: an alias for Reg<IDATA2_SPEC>

IDATA3 register accessor: an alias for Reg<IDATA3_SPEC>

IOFF0 register accessor: an alias for Reg<IOFF0_SPEC>

IOFF1 register accessor: an alias for Reg<IOFF1_SPEC>

IOFF2 register accessor: an alias for Reg<IOFF2_SPEC>

IOFF3 register accessor: an alias for Reg<IOFF3_SPEC>

ISQ register accessor: an alias for Reg<ISQ_SPEC>

RDATA register accessor: an alias for Reg<RDATA_SPEC>

RSQ0 register accessor: an alias for Reg<RSQ0_SPEC>

RSQ1 register accessor: an alias for Reg<RSQ1_SPEC>

RSQ2 register accessor: an alias for Reg<RSQ2_SPEC>

SAMPT0 register accessor: an alias for Reg<SAMPT0_SPEC>

SAMPT1 register accessor: an alias for Reg<SAMPT1_SPEC>

STAT register accessor: an alias for Reg<STAT_SPEC>

WDHT register accessor: an alias for Reg<WDHT_SPEC>

WDLT register accessor: an alias for Reg<WDLT_SPEC>