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#[doc = "Register `SWEVG` writer"] pub struct W(crate::W<SWEVG_SPEC>); impl core::ops::Deref for W { type Target = crate::W<SWEVG_SPEC>; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl core::convert::From<crate::W<SWEVG_SPEC>> for W { fn from(writer: crate::W<SWEVG_SPEC>) -> Self { W(writer) } } #[doc = "Break generation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum BRKG_AW { #[doc = "1: Generate a break event"] BREAK = 1, } impl From<BRKG_AW> for bool { #[inline(always)] fn from(variant: BRKG_AW) -> Self { variant as u8 != 0 } } #[doc = "Field `BRKG` writer - Break generation"] pub struct BRKG_W<'a> { w: &'a mut W, } impl<'a> BRKG_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: BRKG_AW) -> &'a mut W { self.bit(variant.into()) } #[doc = "Generate a break event"] #[inline(always)] pub fn break_(self) -> &'a mut W { self.variant(BRKG_AW::BREAK) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u16 & 0x01) << 7); self.w } } #[doc = "Trigger generation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum TRGG_AW { #[doc = "1: Generate a trigger event"] TRIGGER = 1, } impl From<TRGG_AW> for bool { #[inline(always)] fn from(variant: TRGG_AW) -> Self { variant as u8 != 0 } } #[doc = "Field `TRGG` writer - Trigger generation"] pub struct TRGG_W<'a> { w: &'a mut W, } impl<'a> TRGG_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: TRGG_AW) -> &'a mut W { self.bit(variant.into()) } #[doc = "Generate a trigger event"] #[inline(always)] pub fn trigger(self) -> &'a mut W { self.variant(TRGG_AW::TRIGGER) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u16 & 0x01) << 6); self.w } } #[doc = "Channel commutation event generation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum CMTG_AW { #[doc = "1: Generate a channel commutation event, updating capture/compare control registers based on the value of CCSE"] UPDATE = 1, } impl From<CMTG_AW> for bool { #[inline(always)] fn from(variant: CMTG_AW) -> Self { variant as u8 != 0 } } #[doc = "Field `CMTG` writer - Channel commutation event generation"] pub struct CMTG_W<'a> { w: &'a mut W, } impl<'a> CMTG_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: CMTG_AW) -> &'a mut W { self.bit(variant.into()) } #[doc = "Generate a channel commutation event, updating capture/compare control registers based on the value of CCSE"] #[inline(always)] pub fn update(self) -> &'a mut W { self.variant(CMTG_AW::UPDATE) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u16 & 0x01) << 5); self.w } } #[doc = "Channel 1 capture or compare event generation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum CH1G_AW { #[doc = "1: Generate a capture or compare event"] CAPTURECOMPARE = 1, } impl From<CH1G_AW> for bool { #[inline(always)] fn from(variant: CH1G_AW) -> Self { variant as u8 != 0 } } #[doc = "Field `CH1G` writer - Channel 1 capture or compare event generation"] pub struct CH1G_W<'a> { w: &'a mut W, } impl<'a> CH1G_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: CH1G_AW) -> &'a mut W { self.bit(variant.into()) } #[doc = "Generate a capture or compare event"] #[inline(always)] pub fn capture_compare(self) -> &'a mut W { self.variant(CH1G_AW::CAPTURECOMPARE) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u16 & 0x01) << 2); self.w } } #[doc = "Channel 0 capture or compare event generation"] pub type CH0G_AW = CH1G_AW; #[doc = "Field `CH0G` writer - Channel 0 capture or compare event generation"] pub struct CH0G_W<'a> { w: &'a mut W, } impl<'a> CH0G_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: CH0G_AW) -> &'a mut W { self.bit(variant.into()) } #[doc = "Generate a capture or compare event"] #[inline(always)] pub fn capture_compare(self) -> &'a mut W { self.variant(CH0G_AW::CAPTURECOMPARE) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u16 & 0x01) << 1); self.w } } #[doc = "Update generation\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum UPG_AW { #[doc = "1: Re-initializes the timer counter and generates an update of the registers."] UPDATE = 1, } impl From<UPG_AW> for bool { #[inline(always)] fn from(variant: UPG_AW) -> Self { variant as u8 != 0 } } #[doc = "Field `UPG` writer - Update generation"] pub struct UPG_W<'a> { w: &'a mut W, } impl<'a> UPG_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: UPG_AW) -> &'a mut W { self.bit(variant.into()) } #[doc = "Re-initializes the timer counter and generates an update of the registers."] #[inline(always)] pub fn update(self) -> &'a mut W { self.variant(UPG_AW::UPDATE) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u16 & 0x01); self.w } } impl W { #[doc = "Bit 7 - Break generation"] #[inline(always)] pub fn brkg(&mut self) -> BRKG_W { BRKG_W { w: self } } #[doc = "Bit 6 - Trigger generation"] #[inline(always)] pub fn trgg(&mut self) -> TRGG_W { TRGG_W { w: self } } #[doc = "Bit 5 - Channel commutation event generation"] #[inline(always)] pub fn cmtg(&mut self) -> CMTG_W { CMTG_W { w: self } } #[doc = "Bit 2 - Channel 1 capture or compare event generation"] #[inline(always)] pub fn ch1g(&mut self) -> CH1G_W { CH1G_W { w: self } } #[doc = "Bit 1 - Channel 0 capture or compare event generation"] #[inline(always)] pub fn ch0g(&mut self) -> CH0G_W { CH0G_W { w: self } } #[doc = "Bit 0 - Update generation"] #[inline(always)] pub fn upg(&mut self) -> UPG_W { UPG_W { w: self } } #[doc = "Writes raw bits to the register."] pub unsafe fn bits(&mut self, bits: u16) -> &mut Self { self.0.bits(bits); self } } #[doc = "Software event generation register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swevg](index.html) module"] pub struct SWEVG_SPEC; impl crate::RegisterSpec for SWEVG_SPEC { type Ux = u16; } #[doc = "`write(|w| ..)` method takes [swevg::W](W) writer structure"] impl crate::Writable for SWEVG_SPEC { type Writer = W; } #[doc = "`reset()` method sets SWEVG to value 0"] impl crate::Resettable for SWEVG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } }